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{{Short description|Additional storage that enables faster access to main storage}}
{{Use dmy dates|date=August 2020}}
{{Use American English|date=July 2024}}
{{Redirect|Caching|3=Cache (disambiguation)}}
[[File:cache,basic.svg|thumb|upright=1|Diagram of a CPU memory cache operation]]
In
{{cite web|url=http://www.oxforddictionaries.com/definition/english/cache|archive-url=https://web.archive.org/web/20120818122040/http://oxforddictionaries.com/definition/english/cache|url-status=dead|archive-date=18 August 2012|title=Cache|work=Oxford Dictionaries|access-date=2 August 2016}}</ref> is a hardware or software component that stores data so that future requests for that data can be served faster; the data stored in a cache might be the result of an earlier computation or a copy of data stored elsewhere. A '''cache hit''' occurs when the requested data can be found in a cache, while a '''cache miss''' occurs when it cannot. Cache hits are served by reading data from the cache, which is faster than recomputing a result or reading from a slower data store; thus, the more requests that can be served from the cache, the faster the system performs.<ref>{{Cite journal|last1=Zhong|first1=Liang|last2=Zheng|first2=Xueqian|last3=Liu|first3=Yong|last4=Wang|first4=Mengting|last5=Cao|first5=Yang|date=February 2020|title=Cache hit ratio maximization in device-to-device communications overlaying cellular networks|url=http://dx.doi.org/10.23919/jcc.2020.02.018|journal=China Communications|volume=17|issue=2|pages=232–238|doi=10.23919/jcc.2020.02.018|s2cid=212649328|issn=1673-5447|url-access=subscription}}</ref>
To be cost-effective, caches must be relatively small. Nevertheless, caches are effective in many areas of computing because typical [[Application software|computer applications]] access data with a high degree of [[locality of reference]]. Such access patterns exhibit temporal locality, where data is requested that has been recently requested, and spatial locality, where data is requested that is stored near data that has already been requested.
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Hardware implements cache as a [[block (data storage)|block]] of memory for temporary storage of data likely to be used again. [[Central processing unit]]s (CPUs), [[solid-state drive]]s (SSDs) and hard disk drives (HDDs) frequently include hardware-based cache, while [[web browser]]s and [[web server]]s commonly rely on software caching.
A cache is made up of a pool of entries. Each entry has associated ''data'', which is a copy of the same data in some ''backing store''. Each entry also has a ''tag'', which specifies the identity of the data in the backing store of which the entry is a copy.
When the cache client (a CPU, web browser, [[operating system]]) needs to access data presumed to exist in the backing store, it first checks the cache. If an entry can be found with a tag matching that of the desired data, the data in the entry is used instead. This situation is known as a '''cache hit'''. For example, a web browser program might check its local cache on disk to see if it has a local copy of the contents of a web page at a particular [[URL]]. In this example, the URL is the tag, and the content of the web page is the data. The percentage of accesses that result in cache hits is known as the '''hit rate''' or '''hit ratio''' of the cache.
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During a cache miss, some other previously existing cache entry is typically removed in order to make room for the newly retrieved data. The [[Heuristic (computer science)|heuristic]] used to select the entry to replace is known as the [[Cache replacement policies|replacement policy]]. One popular replacement policy, least recently used (LRU), replaces the oldest entry, the entry that was accessed less recently than any other entry. More sophisticated caching algorithms also take into account the frequency of use of entries.
==={{Anchor|Dirty|WRITEPOLICIES|WRITE-BACK|WRITE-BEHIND|WRITE-THROUGH|WRITE-AROUND}}
[[File:Write-through with no-write-allocation.svg|thumb|380px|A write-through cache without write allocation]]
[[File:Write-back with write-allocation.svg|thumb|500px|A write-back cache with write allocation]]
* ''Write-through'':
* ''Write-back'':
A write-back cache is more complex to implement since it needs to track which of its locations have been written over and mark them as ''dirty'' for later writing to the backing store. The data in these locations are written back to the backing store only when they are evicted from the cache, a process referred to as a ''lazy write''. For this reason, a read miss in a write-back cache
* ''Write allocate'' (also called ''fetch on write''):
* ''No-write allocate'' (also called ''write-no-allocate'' or ''write around''):
* A write-back cache
* A write-through cache uses no-write allocate. Here, subsequent writes have no advantage, since they still need to be written directly to the backing store.
Entities other than the cache may change the data in the backing store, in which case the copy in the cache may become out-of-date or ''stale''. Alternatively, when the client updates the data in the cache, copies of
===Prefetch===
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Caches with a [[prefetch input queue]] or more general ''anticipatory paging policy'' go further—they not only read the data requested, but guess that the next chunk or two of data will soon be required, and so prefetch that data into the cache ahead of time. Anticipatory paging is especially helpful when the backing store has a long latency to read the first chunk and much shorter times to sequentially read the next few chunks, such as [[disk storage]] and DRAM.
A few operating systems go further with a [[loader (computing)|loader]] that always pre-loads the entire executable into RAM. A few caches go even further, not only pre-loading an entire file, but also starting to load other related files that may soon be requested, such as the [[page cache]] associated with a [[prefetcher]] or the [[web cache]] associated with [[link prefetching]].
=={{anchor|HARDWARE}}Examples of hardware caches==
===CPU cache===
{{Main|CPU cache}}
Small memories on or close to the CPU can operate faster than the much larger [[main memory]].<ref>{{Cite journal|last1=Su|first1=Chao|last2=Zeng|first2=Qingkai|date=2021-06-10|editor-last=Nicopolitidis|editor-first=Petros|title=Survey of CPU Cache-Based Side-Channel Attacks: Systematic Analysis, Security Models, and Countermeasures|journal=Security and Communication Networks|language=en|volume=2021|pages=1–15|doi=10.1155/2021/5559552|issn=1939-0122|doi-access=free}}</ref> Most CPUs since the 1980s have used one or more caches, sometimes [[CPU cache#Multi-level caches|in cascaded levels]]; modern high-end [[Embedded computing|embedded]], [[Desktop computer|desktop]] and server [[microprocessor]]s may have as many as six types of cache (between levels and functions).<ref>{{cite web|title=Intel Broadwell Core i7 5775C '128MB L4 Cache' Gaming Behemoth and Skylake Core i7 6700K Flagship Processors Finally Available In Retail|date=25 September 2015|url=https://wccftech.com/intel-broadwell-core-i7-5775c-128mb-l4-cache-and-skylake-core-i7-6700k-flagship-processors-available-retail/}} Mentions L4 cache. Combined with separate I-Cache and TLB, this brings the total 'number of caches (levels+functions) to 6.</ref> Some examples of caches with a specific function are the [[D-cache]], [[I-cache]] and the [[translation lookaside buffer]] for the [[memory management unit]] (MMU).
==={{Anchor|GPU}}GPU cache===
Earlier [[graphics processing unit]]s (GPUs) often had limited read-only [[texture cache]]s
As GPUs advanced,
===DSPs===
[[Digital signal processor]]s have similarly
===Translation lookaside buffer===
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==In-network cache==
===Information-centric networking===
[[Information-centric networking]] (ICN) is an approach to evolve the [[Internet]] infrastructure away from a host-centric paradigm, based on perpetual connectivity and the [[end-to-end principle]], to a network architecture in which the focal point is identified information
Unlike proxy servers, in ICN the cache is a network-level solution. Therefore, it has rapidly changing cache states and higher request arrival rates; moreover, smaller cache sizes
====Policies====
=====Time aware least recently used
The
In the TLRU algorithm, when a piece of content arrives, a cache node calculates the local TTU value based on the TTU value assigned by the content publisher. The local TTU value is calculated by using a locally defined function. Once the local TTU value is calculated the replacement of content is performed on a subset of the total content stored in cache node. The TLRU ensures that less popular and
=====Least frequent recently used
The
====Weather forecast====
In 2011, the use of smartphones with weather forecasting options was overly taxing [[AccuWeather]] servers; two requests
==Software caches==
===Disk cache===
While CPU caches are generally managed entirely by hardware, a variety of software manages other caches. The [[page cache]] in main memory
▲While CPU caches are generally managed entirely by hardware, a variety of software manages other caches. The [[page cache]] in main memory, which is an example of disk cache, is managed by the operating system [[Kernel (operating system)|kernel]].
While the [[disk buffer]], which is an integrated part of the hard disk drive or solid state drive, is sometimes misleadingly referred to as
Finally, a fast local hard disk drive can also cache information held on even slower data storage devices, such as remote servers ([[web cache]]) or local [[tape drive]]s or [[optical jukebox]]es; such a scheme is the main concept of [[hierarchical storage management]]. Also, fast flash-based solid-state drives (SSDs) can be used as caches for slower rotational-media hard disk drives, working together as [[hybrid drive]]s
===Web cache===
{{Main|Web cache}}
Web browsers and [[
Another form of cache is [[P2P caching]], where the files most sought for by [[peer-to-peer]] applications are stored in an ISP cache to accelerate P2P transfers. Similarly, decentralised equivalents exist, which allow communities to perform the same task for P2P traffic, for example, Corelli.<ref>{{cite conference|last1=Tyson|first1=Gareth|last2=Mauthe|first2=Andreas|last3=Kaune|first3=Sebastian|last4=Mu|first4=Mu|last5=Plagemann|first5=Thomas|title=Corelli: A Dynamic Replication Service for Supporting Latency-Dependent Content in Community Networks|url=http://comp.eprints.lancs.ac.uk/2044/1/MMCN09.pdf|conference=MMCN'09|archive-url=https://web.archive.org/web/20150618193018/http://comp.eprints.lancs.ac.uk/2044/1/MMCN09.pdf|archive-date=2015-06-18}}</ref>
===Memoization===
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===Content delivery network===
{{
A [[content delivery network]] (CDN) is a network of distributed servers that deliver pages and other
CDNs
===Cloud storage gateway===
{{Main|Cloud storage gateway}}
A [[cloud storage gateway
===Other caches===
The
Write-through operation is common when operating over [[unreliable
[[Web search
[[Database caching]] can substantially improve the throughput of [[database]] applications, for example in the processing of [[Database index|indexes]], [[Data dictionary|data dictionaries]], and frequently used subsets of data.
A [[distributed cache]]<ref>{{cite journal|last1=Paul|first1=S.|last2=Fei|first2=Z.|date=1 February 2001|title=Distributed caching with centralized control|journal=Computer Communications|volume=24|issue=2|pages=256–268|citeseerx=10.1.1.38.1094|doi=10.1016/S0140-3664(00)00322-4}}
=={{anchor|The difference between buffer and cache}}<!--Former section name used in external links-->Buffer vs. cache==
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{{Authority control}}
[[Category:Cache (computing)| ]]
[[Category:Computer architecture]]
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