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'''Segger Microcontroller'''
==History==
Segger Microcontroller was founded in 1992 by Rolf Segger in [[Hilden]], Germany.<ref name="Segger-About-Company">{{cite web |title=About Us - The Company |url=https://www.segger.com/about-us/the-company/ |website=Segger |archive-url=https://web.archive.org/web/20241206190958/https://www.segger.com/about-us/the-company/ |archive-date=December 6, 2024 |url-status=live}}</ref> The first product was the [[real-time operating system]] (RTOS), now named embOS. It was followed by emWin two years later. Initial products focused on RTOS and [[middleware]] products. However, the company later produced ISP-programming tools (Flasher) and debug probes (J-Link). In 2015, Segger introduced Embedded Studio, their [[Cross-platform software|cross-platform]] IDE for [[central processing unit]]s conforming to the [[ARM architecture]], though recent versions are also used by [[RISC-V]]. All products are developed, maintained and updated in Germany except for Embedded Studio, which is primarily developed by a team of developers in the [[United Kingdom]].
==Product categories==
===Debug and trace probes===
Segger is most noted for its J-Link family, which supports [[JTAG]] (Joint Test Action Group) and SWD (Serial Wire Debug) debug probes for microcontrollers that have older ARM cores ([[ARM7]], [[ARM9]], [[ARM11]]), ARM Cortex-M cores ([[ARM Cortex-M0|M0]], [[ARM Cortex-M0+|M0+]], [[ARM Cortex-M1|M1]], [[ARM Cortex-M3|M3]], [[ARM Cortex-M4|M4]], [[ARM Cortex-M7|M7]], [[ARM Cortex-M23|M23]], [[ARM Cortex-M33|M33]], M85), ARM Cortex-R cores ([[ARM Cortex-R4|R4]], [[ARM Cortex-R5|R5]], [[ARM Cortex-R8|R8]]), ARM Cortex-A cores ([[ARM Cortex-A5|A5]], [[ARM Cortex-A7|A7]], [[ARM Cortex-A8|A8]], [[ARM Cortex-A9|A9]], [[ARM Cortex-A12|A12]], [[ARM Cortex-A15|A15]], [[ARM Cortex-A17|A17]], A53, A72), [[Renesas RX]], Microchip [[PIC32]], [[Silicon Labs|SiLab]] EFM8, [[RISC-V]].<ref>[http://www.segger.com/cms/development-tools.html Segger J-Link Product Line]</ref> It is also repackaged and sold as an OEM item<ref>[http://www.edn.com/article/CA6301710.html Advertisement<!-- Bot generated title -->]</ref> by [[Analog Devices]] as the mIDASLink, [[Atmel]] as the SAM-ICE, [[Digi International]] as the Digi JTAG Link, and [[IAR Systems]] as the J-Link and the J-Link KS. This is the only JTAG emulator that can add Segger's patented flash breakpoint software to a debugger to enable the setting of multiple [[breakpoint]]s in flash while running on an ARM device which is typically hindered by the limited availability of hardware breakpoints.<ref>[http://www.circuitcellar.com/library/newproducts/180/segger.htm Circuit Cellar - Digital Library - New Product News<!-- Bot generated title -->] {{webarchive|url=https://web.archive.org/web/20070311133130/http://www.circuitcellar.com/library/newproducts/180/segger.htm |date=2007-03-11 }}</ref>
In the following table, the top group are trace devices, the bottom group are educational / hobbyist devices.
{| class="wikitable nounderlines sortable" style="text-align: center;"
|+ <big>J-Trace & J-Link Models</big><ref>{{cite web |title=J-Trace Products |url=https://www.segger.com/products/debug-probes/j-trace/ |website=Segger Microcontroller Systems |archive-url=https://web.archive.org/web/20241007101418/https://www.segger.com/products/debug-probes/j-trace/ |archive-date=October 7, 2024 |url-status=live}}</ref><ref>{{cite web |title=J-Link Products |url=https://www.segger.com/products/debug-probes/j-link/ |website=Segger Microcontroller Systems |archive-url=https://web.archive.org/web/20241112024425/https://www.segger.com/products/debug-probes/j-link/ |archive-date=November 12, 2024 |url-status=live}}</ref>
|-
! Model !! Host<br/>[[USB#Release_versions|USB]]<br />speed !! Host<br/>[[Ethernet physical layer|Ethernet]]<br />speed !! Host<br/>[[Wi-Fi#Versions_and_generations|Wi-Fi]]<br
|-
| style="text-align:left" | J-Trace PRO<br/>(''ARM & RISC-V'') || {{yes|3.0 [[USB#Release_versions|SS]]}} || {{yes|1 [[Gbit/s]]}} || None ||
|-
| style="text-align:left" | J-Trace PRO Cortex-A/R/M || {{yes|3.0 SS}} || {{yes|1 Gbit/s}} || None || 1.2V to 5V || {{yes|19-pins,<br/>1.27mm<br/>(150 MHz)}} || {{yes|20-pins,<br/>2.54mm<br/>(50 MHz)}} || {{yes|4 MByte/s}} || None || All || [[File:J-Trace Cortex-ARM 1349x1466 230627.png|95px]]
▲! Model !! Host<br/>[[USB#Release_versions|USB]]<br />speed !! Host<br/>[[Ethernet physical layer|Ethernet]]<br />speed !! Host<br/>[[Wi-Fi#Versions_and_generations|Wi-Fi]]<br /> !! Debug<br />[[Pin header|connector]]<br />(pin pitch) !! Trace<br/>[[Pin header|connector]]<br /> !! Target<br/>[[volt]]age<br /> !! Target max<br />interface<br />speed !! Target max<br />download<br />speed !! Target<br />[[Virtual COM port|VCOM]]<br />[[Universal asynchronous receiver-transmitter|UART]] !! Software<br />features<br /> !! Photo<br /> <br />
|-
| style="text-align:left" | J-Trace PRO Cortex-
|-
| style="text-align:left" | J-Trace PRO
|-
▲| style="text-align:left" | J-Trace PRO RISC-V || {{yes|3.0 SS}} || {{yes|1 Gbit/s}} || None || 20-pin (0.1") || {{yes|19-pin 0.05"}} || 1.2V to 5V || {{yes|50 MHz}} || {{yes|4 MByte/s}} || 2 pins || All || [[File:J-Trace RISC-V 1349x1466.png|95px]]
|-
| style="text-align:left" | J-Link PRO [[Power over Ethernet|PoE]] || 2.0 [[USB#Release_versions|HS]] || {{yes|100 [[Mbit/s]]<br/>([[Power over Ethernet|PoE]])}} || None || 1.2V to 5V || None || {{yes|20-pins,<br/>2.54mm<br/>(50 MHz)}} || {{yes|4 MByte/s}} || {{yes|2-pins<br/>([[Baud|10M]])}} || All || {{sp}}
▲| style="background: black;" | {{sp}} || style="background: black;" | {{sp}} || style="background: black;" | {{sp}} || style="background: black;" | {{sp}} || style="background: black;" | {{sp}} || style="background: black;" | {{sp}} || style="background: black;" | {{sp}} || style="background: black;" | {{sp}} || style="background: black;" | {{sp}} || style="background: black;" | {{sp}} || style="background: black;" | {{sp}} || style="background: black;" | {{sp}} <!-- NOTE - grouping divider -->
|-
| style="text-align:left" | J-Link PRO || 2.0 HS || {{yes|100 Mbit/s}}
|-
| style="text-align:left" | J-Link ULTRA+ || 2.0 HS || None
|-
| style="text-align:left" | J-Link [[WiFi]] || 2.0 HS || None || {{yes|802.11b/g/n<br/>(2.
|-
| style="text-align:left" | J-Link PLUS
|-
| style="text-align:left" | J-Link BASE
|-
|-
| style="text-align:left; background: #FFE3E3; color: black" | J-Link EDU<br/>('''discontinued''') || 2.0 HS || None
|-
| style="text-align:left" | J-Link EDU Mini || {{maybe|2.0 [[USB#Release_versions|FS]]}} || None || None || {{maybe|
|-
| style="text-align:left" | J-Link OB
|}
* Note: Further models are J-Link LITE ARM, J-Link LITE CortexM, J-Link LITE RX, J-Link OEM.<ref>[http://www.segger.com/other-j-links.html Other J-Links; segger.com]</ref>
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* Note: The EDU & EDU Mini models cannot be used for commercial software development, also doesn't come with J-Flash, J-Flash-SPI, RDDI, RDI options.
* Note: Adapters and isolators are available to convert the 20-pin 0.1"/2.54mm [[Pin header|male shrouded (box) header]] to another target board connector.<ref>[http://www.segger.com/jlink-adapters.html J-Link adapters and isolators; segger.com]</ref>
* Note: The compact variants are functionally identical to
==See also==
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