Floating-point unit: Difference between revisions

Revision as of 13:57, 2 April 2025

Latest revision as of 15:17, 2 April 2025

(One intermediate revision by the same user not shown)

Line 1:

{{short description|Part of a computer system}}

[[File:X87 FPUs.jpg|Collection of the [[x87]] family of math coprocessors by [[Intel]]|thumb|upright=1]]

A '''floating-point unit''' ('''FPU'''), '''numeric processing unit''' ('''NPU'''),<ref>{{cite web |url=https://www.computinghistory.org.uk/det/35216/Intel-80287XL-Numeric-Processing-Unit/ |title=Intel 80287XL Numeric Processing Unit |website=computinghistory.org.uk |access-date=2024-11-02}}</ref> colloquially '''math coprocessor''', is a part of a [[computer]] system specially designed to carry out operations on [[Floating-point arithmetic|floating-point]] numbers.<ref>{{Cite journal |author-last1=Anderson |author-first1=Stanley F. |author-last2=Earle |author-first2=John G. |author-last3=Goldschmidt |author-first3=Robert Elliott |author-last4=Powers |author-first4=Don M. |date=January 1967 |title=The IBM System/360 Model 91: Floating-Point Execution Unit |journal=[[IBM Journal of Research and Development]] |volume=11 |issue=1 |pages=34–53 |doi=10.1147/rd.111.0034 |issn=0018-8646}}</ref> Typical operations are [[addition]], [[subtraction]], [[multiplication]], [[division (mathematics)|division]], and [[square root]]. Modern designs generally include a special[[fused multiply-and-add]] instruction, which was found to be very common in real-world code. Some FPUs can also perform various [[transcendental function]]s such as [[Exponential function|exponential]] or [[trigonometric]] calculations, but the accuracy can be low,<ref>{{cite web |author=Dawson |first=Bruce |date=2014-10-09 |title=Intel Underestimates Error Bounds by 1.3 quintillion |url=https://randomascii.wordpress.com/2014/10/09/intel-underestimates-error-bounds-by-1-3-quintillion/ |access-date=2020-01-16 |website=randomascii.wordpress.com}}</ref><ref>{{cite web |url=https://software.intel.com/en-us/blogs/2014/10/09/fsin-documentation-improvements-in-the-intel-64-and-ia-32-architectures-software |title=FSIN Documentation Improvements in the "Intel® 64 and IA-32 Architectures Software Developer's Manual" |website=intel.com | date=2014-10-09 |access-date=2020-01-16 |archive-url=https://web.archive.org/web/20200116083121/https://software.intel.com/en-us/blogs/2014/10/09/fsin-documentation-improvements-in-the-intel-64-and-ia-32-architectures-software |archive-date=2020-01-16 |url-status=dead}}</ref> so some systems prefer to compute these functions in software.

Floating -point operations were originally handled in [[software]] in early computers. Over time, manufacturers began to provide standardized floating -point libraries as part of their software collections. Some machines, those dedicated to scientific processing, would include specialized hardware to perform some of these tasks with much greater speed. The introduction of [[microcode]] in the 1960s allowed these instructions to be included in the system's [[instruction set architecture]] (ISA). Normally these would be decoded by the microcode into a series of instructions that were similar to the libraries, but on those machines with an FPU, they would instead be routed to that unit, which would perform them much faster. This allowed floating -point instructions to become universal while the floating -point hardware remained optional; for instance, on the [[PDP-11]] one could add the Floating Pointfloating-point Processorprocessor unit at any time using plug-in [[expansion card]]s.

The introduction of the [[microprocessor]] in the 1970s led to a similar evolution as the earlier [[mainframe]]s and [[minicomputer]]s. Early [[microcomputer]] systems performed floating point in software, typically in a vendor-specific library included in [[ROM]]. Dedicated single-chip FPUs began to appear late in the decade, but they remained rare in real-world systems until the mid-1980s, and using them required software to be re-written to call them. As they became more common, the software libraries were modified to work like the microcode of earlier machines, performing the instructions on the main CPU if needed, but offloading them to the FPU if one was present. By the late 1980s, [[semiconductor manufacturing]] had improved to the point where it became possible to include an FPU with the main CPU, resulting in designs like the [[i486]] and [[68040]]. These designs were known as an "integrated FPU"s, and from the mid-1990s, FPUs were a standard feature of most CPU designs except those designed as low-cost as [[embedded processor]]s.

In modern designs, a single CPU will typically include several [[arithmetic logic unit]]s (ALUs) and several FPUs, reading many instructions at the same time and routing them to the various units for parallel execution. By the 2000s, even embedded processors generally included an FPU as well.