Symmetric multiprocessing: Difference between revisions

Revision as of 21:51, 24 June 2025

Latest revision as of 18:27, 13 August 2025

(6 intermediate revisions by 4 users not shown)

Line 1:

{{Short description|The equalEqual sharing of all resources by multiple identical processors}}

{{Multiple issues|

{{more citations needed|date=November 2012}}

{{Expert needed|Computing|date=June 2025}}

}}

[[File:SMP - Symmetric Multiprocessor System.svg|thumb|upright=2|Diagram of a symmetric multiprocessing system]]

Line 17:

Processors may be interconnected using buses, [[crossbar switch]]es or on-chip mesh networks. The bottleneck in the scalability of SMP using buses or crossbar switches is the bandwidth and power consumption of the interconnect among the various processors, the memory, and the disk arrays. Mesh architectures avoid these bottlenecks, and provide nearly linear scalability to much higher processor counts at the sacrifice of programmability:

<blockquote>Serious programming challenges remain with this kind of architecture because it requires two distinct modes of programming;, one for the CPUs themselves and one for the interconnect between the CPUs. A single programming language would have to be able to not only partition the workload, but also comprehend the memory locality, which is severe in a mesh-based architecture.<ref name="AutoMQ-1"/></blockquote>

SMP systems allow any processor to work on any task no matter where the data for that task is located in memory, provided that each task in the system is not in execution on two or more processors at the same time. With proper [[operating system]] support, SMP systems can easily move tasks between processors to balance the workload efficiently.

Line 57:

In current SMP systems, all of the processors are tightly coupled inside the same box with a bus or switch; on earlier SMP systems, a single CPU took an entire cabinet. Some of the components that are shared are global memory, disks, and I/O devices. Only one copy of an OS runs on all the processors, and the OS must be designed to take advantage of this architecture. Some of the basic advantages involves cost-effective ways to increase throughput. To solve different problems and tasks, SMP applies multiple processors to that one problem, known as [[parallel programming]].

However, there are somea reasonsfew thatlimits implementon SMPthe mayscalability beof complex,SMP due to [[cache coherence]] and shared objects.

== Programming ==

Line 88:

Variable Symmetric Multiprocessing (vSMP) is a specific mobile use case technology initiated by NVIDIA. This technology includes an extra fifth core in a quad-core device, called the Companion core, built specifically for executing tasks at a lower frequency during mobile active standby mode, video playback, and music playback.

Project Kal-El ([[Tegra 3]]),<ref name="AutoMQ-4" /> patented by NVIDIA, was the first SoC (System on Chip) to implement this new vSMP technology. This technology reduces mobile power consumption during active standby state, butand also maximizes quad core performance during active usage for intensive mobile applications. Overall this technology addresses the need for increase in battery life performance during active and standby usage by reducing the power consumption in mobile processors.

== See also ==