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{{copyedit|reason=an encylopedic tone in the lead section|date=July 2025}}
[[Network packet]] steering of transmitted and received traffic for [[Multi-core_processor|multi-core architectures]] is needed in modern network computing environment, especially in [[Data_center|data centers]], where the high bandwidth and heavy loads would easily congestion a single core's [[Queueing theory|queue]].<ref name="RSS++">{{Cite book |last1=Barbette |first1=Tom |last2=Katsikas |first2=Georgios P. |last3=Maguire |first3=Gerald Q. |last4=Kostić |first4=Dejan |chapter=RSS++: Load and state-aware receive side scaling |date=2019-12-03 |title=Proceedings of the 15th International Conference on Emerging Networking Experiments and Technologies |chapter-url=https://dl.acm.org/doi/10.1145/3359989.3365412 |pages=318–333 |___location=New York, NY, USA |publisher=Association for Computing Machinery |doi=10.1145/3359989.3365412 |hdl=2078.1/262641 |isbn=978-1-4503-6998-5 }}</ref>
[[File:Simple NIC and cores architecture.png|thumb|upright=1.7|Simple graph showing the path receiving packets need to travel to reach the cores' queues]]
For this reason many techniques, both in hardware and in software, are leveraged in order to distribute the incoming load of packets across the cores of the [[Central processing unit|processor]].
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