Content deleted Content added
removed Category:Electronic design automation software using HotCat |
Ron Waffle (talk | contribs) m bioinfomatics->bioinformatics - Correct typos in one click |
||
(11 intermediate revisions by 11 users not shown) | |||
Line 1:
{{unreferenced|date=May 2012}}
'''Flow to HDL''' tools and methods convert flow-based system design into a [[hardware description language]] (HDL) such as [[VHDL]] or [[Verilog]]. Typically this is a method of creating designs for [[field-programmable gate array]], [[application-specific integrated circuit]] prototyping and [[
== History==
The use of flow-based design tools in engineering is a reasonably new trend. [[Unified Modeling Language]] is the most widely
== Applications ==
Most applications are ones which take too long with existing supercomputer architectures. These include
== Examples ==
*Xilinx System Generator from [http://www.Xilinx.com/ Xilinx]
*StarBridge VIVA from
*Nimbus from defunct <s>[http://www.exsedia.com/ Exsedia]</s>
== External links ==
*[http://www.cse.clrc.ac.uk/disco/publications/FPGA_overview_2.0.pdf]{{dead link|date=October 2017 |bot=InternetArchiveBot |fix-attempted=yes }} an overview of flows by Daresbury Labs.
*[https://web.archive.org/web/20070216180902/http://www.xilinx.com/products/design_tools/logic_design/advanced/esl/index.htm] Xilinx's ESL initiative, some products listed and C to VHDL tools.
== See also ==
* [[ASIC|Application Specific Integrated Circuit]] (ASIC)
* [[C to HDL]]
Line 26 ⟶ 27:
* [[Embedded C++]]
* [[Field Programmable Gate Array]] (FPGA)
* [[Hardware description language]] (HDL)
* [[Handel-C]]
* [[Icarus Verilog]]
* [[Lustre (programming language)]]
* [[MyHDL]]
Line 45:
* [[Verilog-A]]
* [[Verilog-AMS]]
{{Programmable Logic}}
{{DEFAULTSORT:Flow To Hdl}}
|