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{{Redirect|FET}}
{{anchor|Drain|Source|Gate}}
{{short description|Type of transistor}}
[[File:FET cross section.svg|thumb|300px|Cross-sectional view of a MOSFET type field-effect transistor, showing ''source'', ''gate'' and ''drain'' terminals, and insulating oxide layer.]]
The '''field-effect transistor''' ('''FET''') is a type of [[transistor]] that uses an [[electric field]] to control the [[Electric current|current]] through a [[semiconductor]]. It comes in two types: [[JFET|junction FET]] (JFET) and [[MOSFET|metal–oxide–semiconductor FET]] (MOSFET). FETs have three terminals: ''source'', ''gate'', and ''drain''. FETs control the current by the application of a [[voltage]] to the gate, which in turn alters the [[Electrical resistivity and conductivity|conductivity]] between the drain and source.
FETs are also known as '''unipolar transistors''' since they involve single-carrier-type operation. That is, FETs use either [[electron]]s (n-channel) or [[hole (semiconductor)|hole]]s (p-channel) as [[charge carrier]]s in their operation, but not both. Many different types of field effect transistors exist. Field effect transistors generally display very [[High impedance|high input impedance]] at low frequencies. The most widely used field-effect transistor is the [[MOSFET]].
==History==
{{Further|History of the transistor}}
[[File:Julius Edgar Lilienfeld (1881-1963).jpg|thumb|144px|[[Julius Edgar Lilienfeld]], who proposed the concept of a field-effect transistor in 1925.]]
The concept of a field-effect transistor (FET) was first patented by the Austro-Hungarian born physicist [[Julius Edgar Lilienfeld]] in 1925<ref>Lilienfeld, J.E. [https://pdfpiw.uspto.gov/.piw?Docid=01745175 "Method and apparatus for controlling electric current"] {{Webarchive|url=https://web.archive.org/web/20220409014726/https://pdfpiw.uspto.gov/.piw?Docid=01745175 |date=2022-04-09 }} US Patent no. 1,745,175 (filed: 8 October 1926 ; issued: 28 January 1930).</ref><ref>{{patent|CA|272437|"Electric current control mechanism", first filed in Canada on October 22, 1925}}</ref> and by [[Oskar Heil]] in 1934, but they were unable to build a working practical [[semiconductor device|semiconducting device]] based on the concept. The [[transistor]] effect was later observed and explained by [[John Bardeen]] and [[Walter Houser Brattain]] while working under [[William Shockley]] at [[Bell Labs]] in 1947, shortly after the 17-year patent expired. Shockley initially attempted to build a working FET by trying to modulate the conductivity of a [[semiconductor]], but was unsuccessful, mainly due to problems with the [[surface states]], the [[dangling bond]], and the [[germanium]] and [[copper]] compound materials. In the course of trying to understand the mysterious reasons behind their failure to build a working FET, it led to Bardeen and Brattain instead inventing the [[point-contact transistor]] in 1947, which was followed by Shockley's [[bipolar junction transistor]] in 1948.<ref name="Lee">{{cite book |last1=Lee |first1=Thomas H. |title=The Design of CMOS Radio-Frequency Integrated Circuits |date=2003 |publisher=[[Cambridge University Press]] |isbn=978-1-139-64377-1 |url=https://web.stanford.edu/class/archive/ee/ee214/ee214.1032/Handouts/HO2.pdf |access-date=2019-07-20 |archive-date=2019-12-09 |archive-url=https://web.archive.org/web/20191209032130/https://web.stanford.edu/class/archive/ee/ee214/ee214.1032/Handouts/HO2.pdf }}</ref><ref name="Puers">{{cite book |last1=Puers |first1=Robert |last2=Baldi |first2=Livio |last3=Voorde |first3=Marcel Van de |last4=Nooten |first4=Sebastiaan E. van |title=Nanoelectronics: Materials, Devices, Applications, 2 Volumes |date=2017 |publisher=[[John Wiley & Sons]] |isbn=978-3-527-34053-8 |page=14 |url=https://books.google.com/books?id=JOqVDgAAQBAJ&pg=PA14}}</ref>
The first FET device to be successfully built was the [[JFET|junction field-effect transistor]] (JFET).<ref name="Lee"/> A JFET was first patented by [[Heinrich Welker]] in 1945.<ref>{{cite book |title=The Physics of Semiconductors|author=Grundmann, Marius|isbn=978-3-642-13884-3 |publisher=Springer-Verlag|year=2010}}</ref> The [[static induction transistor]] (SIT), a type of JFET with a short channel, was invented by Japanese engineers [[Jun-ichi Nishizawa]] and Y. Watanabe in 1950. Following Shockley's theoretical treatment on the JFET in 1952, a working practical JFET was built by [[George C. Dacey]] and [[Ian Munro Ross|Ian M. Ross]] in 1953.<ref name=sit>{{cite book|first=Jun-Ichi |last=Nishizawa|editor-first1=Roland|editor-last1=Sittig|editor-first2=P.|editor-last2=Roggwiller|publisher=Springer|chapter=Junction Field-Effect Devices|title=Semiconductor Devices for Power Conditioning|year=1982|pages=241–272|doi=10.1007/978-1-4684-7263-9_11|isbn=978-1-4684-7265-3}}</ref> However, the JFET still had issues affecting [[junction transistor]]s in general.<ref name="Moskowitz">{{cite book |last1=Moskowitz |first1=Sanford L. |title=Advanced Materials Innovation: Managing Global Technology in the 21st century |date=2016 |publisher=[[John Wiley & Sons]] |isbn=978-0-470-50892-3 |page=168 |url=https://books.google.com/books?id=2STRDAAAQBAJ&pg=PA168}}</ref> Junction transistors were relatively bulky devices that were difficult to manufacture on a [[mass-production]] basis, which limited them to a number of specialised applications. The insulated-gate field-effect transistor (IGFET) was theorized as a potential alternative to junction transistors, but researchers were unable to build working IGFETs, largely due to the troublesome surface state barrier that prevented the external [[electric field]] from penetrating into the material.<ref name="Moskowitz"/> By the mid-1950s, researchers had largely given up on the FET concept, and instead focused on [[bipolar junction transistor]] (BJT) technology.<ref name="triumph">{{cite web |title=The Foundation of Today's Digital World: The Triumph of the MOS Transistor |url=https://www.youtube.com/watch?v=q6fBEjf9WPw |publisher=[[Computer History Museum]] |access-date=21 July 2019 |date=13 July 2010}}</ref>
The foundations of MOSFET technology were laid down by the work of [[William Shockley]], [[John Bardeen]] and [[Walter Brattain]]. Shockley independently envisioned the FET concept in 1945, but he was unable to build a working device. The next year Bardeen explained his failure in terms of [[surface states]]. Bardeen applied the theory of surface states on semiconductors (previous work on surface states was done by Shockley in 1939 and [[Igor Tamm]] in 1932) and realized that the external field was blocked at the surface because of extra electrons which are drawn to the semiconductor surface. Electrons become trapped in those localized states forming an inversion layer. Bardeen's hypothesis marked the birth of [[Surface_science#Physics|surface physics]]. Bardeen then decided to make use of an inversion layer instead of the very thin layer of semiconductor which Shockley had envisioned in his FET designs. Based on his theory, in 1948 Bardeen patented the progenitor of MOSFET, an insulated-gate FET (IGFET) with an inversion layer. The inversion layer confines the flow of minority carriers, increasing modulation and conductivity, although its electron transport depends on the gate's insulator or quality of oxide if used as an insulator, deposited above the inversion layer. Bardeen's patent as well as the concept of an inversion layer forms the basis of CMOS technology today. In 1976 Shockley described Bardeen's surface state hypothesis "as one of the most significant research ideas in the semiconductor program".<ref name="b1">{{cite book | author=Howard R. Duff | title=AIP Conference Proceedings | chapter=John Bardeen and transistor physics | date=2001 | volume=550 | pages=3–32 | doi=10.1063/1.1354371 | doi-access=free }}</ref>
After Bardeen's surface state theory the trio tried to overcome the effect of surface states. In late 1947, Robert Gibney and Brattain suggested the use of electrolyte placed between metal and semiconductor to overcome the effects of surface states. Their FET device worked, but amplification was poor. Bardeen went further and suggested to rather focus on the conductivity of the inversion layer. Further experiments led them to replace electrolyte with a solid oxide layer in the hope of getting better results. Their goal was to penetrate the oxide layer and get to the inversion layer. However, Bardeen suggested they switch from [[silicon]] to [[germanium]] and in the process their oxide got inadvertently washed off. They stumbled upon a completely different transistor, the [[point-contact transistor]]. [[Lillian Hoddeson]] argues that "had Brattain and Bardeen been working with silicon instead of germanium they would have stumbled across a successful field effect transistor".<ref name="b1" /><ref name="Camezind">{{cite book | author=Hans Camenzind | author-link=Hans Camenzind | title=Designing Analog Chips | date=2005 | url=http://www.designinganalogchips.com/}}</ref><ref>{{cite book | title=ULSI Science and Technology/1997 | url= https://books.google.com/books?id=I8_O1anzKpsC | date=1997 |
page=43|isbn = 978-1-56677-130-6 | last1=Massoud | first1=Hisham Z. | publisher=The Electrochemical Society }}</ref><ref>{{cite journal | author=Lillian Hoddeson | author-link=Lillian Hoddeson | title=Research on crystal rectifiers during World War II and the invention of the transistor | journal=History and Technology | date=1994 | volume=11 | issue=2 | pages=121–130 | doi=10.1080/07341519408581858}}</ref><ref>{{cite book |author=Michael Riordan |author2=Lillian Hoddeson | title=Crystal Fire: The Birth of the Information Age | year=1997 |publisher=W. W. Norton & Company | isbn=978-0-393-04124-8}}</ref>
By the end of the first half of the 1950s, following theoretical and experimental work of Bardeen, Brattain, Kingston, Morrison and others, it became more clear that there were two types of surface states. Fast surface states were found to be associated with the bulk and a semiconductor/oxide interface. Slow surface states were found to be associated with the oxide layer because of [[adsorption]] of atoms, molecules and ions by the oxide from the ambient. The latter were found to be much more numerous and to have much longer [[relaxation (physics)|relaxation time]]s. At the time [[Philo Farnsworth]] and others came up with various methods of producing atomically clean semiconductor surfaces.
In 1955, [[Carl Frosch]] and Lincoln Derrick accidentally covered the surface of silicon [[wafer (electronics)|wafer]] with a layer of [[silicon dioxide]].<ref name="auto">{{Cite patent|number=US2802760A|title=Oxidation of semiconductive surfaces for controlled diffusion|gdate=1957-08-13|invent1=Lincoln|invent2=Frosch|inventor1-first=Derick|inventor2-first=Carl J.|url=https://patents.google.com/patent/US2802760A}}</ref> They showed that oxide layer prevented certain dopants into the silicon wafer, while allowing for others, thus discovering the [[Passivation (chemistry)|passivating]] effect of [[Thermal oxidation|oxidation]] on the semiconductor surface. Their further work demonstrated how to etch small openings in the oxide layer to diffuse dopants into selected areas of the silicon wafer. In 1957, they published a research paper and patented their technique summarizing their work. The technique they developed is known as oxide diffusion masking, which would later be used in the [[semiconductor device fabrication|fabrication]] of MOSFET devices.<ref name=":1">{{Cite journal |last1=Frosch |first1=C. J. |last2=Derick |first2=L |date=1957 |title=Surface Protection and Selective Masking during Diffusion in Silicon |url=https://iopscience.iop.org/article/10.1149/1.2428650 |journal=Journal of the Electrochemical Society |language=en |volume=104 |issue=9 |pages=547 |doi=10.1149/1.2428650|url-access=subscription }}</ref> At Bell Labs, the importance of Frosch's technique was immediately realized. Results of their work circulated around Bell Labs in the form of BTL memos before being published in 1957. At [[Shockley Semiconductor Laboratory|Shockley Semiconductor]], Shockley had circulated the preprint of their article in December 1956 to all his senior staff, including [[Jean Hoerni]].<ref name="Moskowitz" /><ref>{{cite book |author1=Christophe Lécuyer |author2=David C. Brook |author3=Jay Last | title=Makers of the Microchip: A Documentary History of Fairchild Semiconductor | date=2010 | pages=62–63 |publisher=MIT Press | isbn=978-0-262-01424-3 | url=https://books.google.com/books?id=LaZpUpkG70QC&pg=PA62}}</ref><ref>{{cite book |last1=Claeys |first1=Cor L. |title=ULSI Process Integration III: Proceedings of the International Symposium |date=2003 |publisher=[[The Electrochemical Society]] |isbn=978-1-56677-376-8 |pages=27–30 | url=https://books.google.com/books?id=bu22JNYbE5MC&pg=PA27}}</ref>
In 1955, [[Ian Munro Ross]] filed a patent for a [[FeFET]] or MFSFET. Its structure was like that of a modern inversion channel MOSFET, but ferroelectric material was used as a dielectric/insulator instead of oxide. He envisioned it as a form of memory, years before the [[floating gate MOSFET]]. In February 1957, [[J. Torkel Wallmark|John Wallmark]] filed a patent for [[thin-film transistor|FET]] in which [[germanium monoxide]] was used as a gate dielectric, but he didn't pursue the idea. In his other patent filed the same year he described a [[multigate device|double gate]] FET. In March 1957, in his laboratory notebook, Ernesto Labate, a research scientist at [[Bell Labs]], conceived of a device similar to the later proposed MOSFET, although Labate's device didn't explicitly use [[silicon dioxide]] as an insulator.<ref>{{cite book |last1=Lojek |first1=Bo |title=History of Semiconductor Engineering |date=2007 |publisher=Springer Science & Business Media |isbn=978-3-540-34258-8 |page=324}}</ref><ref>{{cite book | author=Stefan Ferdinand Müller | title=Development of HfO2-Based Ferroelectric Memories for Future CMOS Technology Nodes | year=2016 | publisher=BoD – Books on Demand | isbn=978-3-7392-4894-3}}</ref><ref>{{cite book |author1=B.G Lowe |author2=R.A. Sareen | title=Semiconductor X-Ray Detectors | date=2013 |publisher=CRC Press | isbn=978-1-4665-5401-6 }}</ref><ref name="Bassett22">{{cite book |last1=Bassett |first1=Ross Knox |title=To the Digital Age: Research Labs, Start-up Companies, and the Rise of MOS Technology |date=2007 |publisher=Johns Hopkins University Press |isbn=978-0-8018-8639-3 |page=22 |url=https://books.google.com/books?id=UUbB3d2UnaAC&pg=PA22}}</ref>
In 1955, [[Carl Frosch]] and Lincoln Derrick accidentally grew a layer of silicon dioxide over the silicon wafer, for which they observed [[surface passivation]] effects.<ref name=":0">{{Cite journal |last1=Huff |first1=Howard |last2=Riordan |first2=Michael |date=2007-09-01 |title=Frosch and Derick: Fifty Years Later (Foreword) |url=https://iopscience.iop.org/article/10.1149/2.F02073IF |journal=The Electrochemical Society Interface |volume=16 |issue=3 |pages=29 |doi=10.1149/2.F02073IF |issn=1064-8208}}</ref><ref name="auto"/> By 1957 Frosch and Derrick, using masking and predeposition, were able to manufacture silicon dioxide transistors and showed that silicon dioxide insulated, protected silicon wafers and prevented dopants from diffusing into the wafer.<ref name=":0" /><ref name=":1"/> J.R. Ligenza and W.G. Spitzer studied the mechanism of thermally grown oxides and fabricated a high quality Si/[[Silicon dioxide|SiO<sub>2</sub>]] stack in 1960.<ref>{{Cite journal |last1=Ligenza |first1=J. R. |last2=Spitzer |first2=W. G. |date=1960-07-01 |title=The mechanisms for silicon oxidation in steam and oxygen |url=https://linkinghub.elsevier.com/retrieve/pii/0022369760902195 |journal=Journal of Physics and Chemistry of Solids |volume=14 |pages=131–136 |doi=10.1016/0022-3697(60)90219-5 |bibcode=1960JPCS...14..131L |issn=0022-3697|url-access=subscription }}</ref><ref name="Deal">{{cite book |last1=Deal |first1=Bruce E. |title=Silicon materials science and technology |date=1998 |publisher=[[The Electrochemical Society]] |isbn=978-1566771931 |page=183 |chapter=Highlights Of Silicon Thermal Oxidation Technology |chapter-url=https://books.google.com/books?id=cr8FPGkiRS0C&pg=PA183}}</ref><ref>{{cite book |last1=Lojek |first1=Bo |title=History of Semiconductor Engineering |date=2007 |publisher=Springer Science & Business Media |isbn=978-3540342588 |page=322}}</ref>
===Metal–oxide–semiconductor FET (MOSFET)===
{{Main|MOSFET}}
Following this research, [[Mohamed Atalla]] and [[Dawon Kahng]] proposed a silicon MOS transistor in 1959<ref name="Bassett222">{{cite book |last1=Bassett |first1=Ross Knox |url=https://books.google.com/books?id=UUbB3d2UnaAC&pg=PA22 |title=To the Digital Age: Research Labs, Start-up Companies, and the Rise of MOS Technology |date=2007 |publisher=[[Johns Hopkins University Press]] |isbn=978-0-8018-8639-3 |pages=22–23}}</ref> and successfully demonstrated a working MOS device with their Bell Labs team in 1960.<ref>{{cite journal |last1=Atalla |first1=M. |author1-link=Mohamed Atalla |last2=Kahng |first2=D. |author2-link=Dawon Kahng |date=1960 |title=Silicon-silicon dioxide field induced surface devices |journal=IRE-AIEE Solid State Device Research Conference}}</ref><ref>{{cite journal |title=1960 – Metal Oxide Semiconductor (MOS) Transistor Demonstrated |url=https://www.computerhistory.org/siliconengine/metal-oxide-semiconductor-mos-transistor-demonstrated/ |journal=The Silicon Engine |publisher=[[Computer History Museum]] |access-date=2023-01-16}}</ref> Their team included E. E. LaBate and E. I. Povilonis who fabricated the device; M. O. Thurston, L. A. D’Asaro, and J. R. Ligenza who developed the diffusion processes, and H. K. Gummel and R. Lindner who characterized the device.<ref>{{Cite journal |last=KAHNG |first=D. |date=1961 |title=Silicon-Silicon Dioxide Surface Device |url=https://doi.org/10.1142/9789814503464_0076 |journal=Technical Memorandum of Bell Laboratories|pages=583–596 |doi=10.1142/9789814503464_0076 |isbn=978-981-02-0209-5 |url-access=subscription }}</ref><ref>{{Cite book |last=Lojek |first=Bo |title=History of Semiconductor Engineering |date=2007 |publisher=Springer-Verlag Berlin Heidelberg |isbn=978-3-540-34258-8 |___location=Berlin, Heidelberg |page=321}}</ref>
With its [[MOSFET scaling|high scalability]],<ref>{{cite journal |last1=Motoyoshi |first1=M. |s2cid=29105721 |title=Through-Silicon Via (TSV) |journal=Proceedings of the IEEE |date=2009 |volume=97 |issue=1 |pages=43–48 |doi=10.1109/JPROC.2008.2007462 |issn=0018-9219}}</ref> and much lower power consumption and higher density than bipolar junction transistors,<ref>{{cite news |title=Transistors Keep Moore's Law Alive |url=https://www.eetimes.com/author.asp?section_id=36&doc_id=1334068 |access-date=18 July 2019 |work=[[EETimes]] |date=12 December 2018}}</ref> the MOSFET made it possible to build [[Large scale integration|high-density]] integrated circuits.<ref>{{cite web |title=Who Invented the Transistor? |url=https://www.computerhistory.org/atchm/who-invented-the-transistor/ |website=[[Computer History Museum]] |date=4 December 2013 |access-date=20 July 2019}}</ref> The MOSFET is also capable of handling higher power than the JFET.<ref>{{cite book |last1=Duncan |first1=Ben |title=High Performance Audio Power Amplifiers |date=1996 |publisher=[[Elsevier]] |isbn=978-0-08-050804-7 |url=https://books.google.com/books?id=-5UPyE6dcWgC&pg=PA177 |page=177}}</ref> The MOSFET was the first truly compact transistor that could be miniaturised and mass-produced for a wide range of uses.<ref name="Moskowitz" /> The MOSFET thus became the most common type of transistor in computers, electronics,<ref name="kahng">{{cite web |title=Dawon Kahng |url=https://www.invent.org/inductees/dawon-kahng |access-date=27 June 2019 |website=[[National Inventors Hall of Fame]]}}</ref> and [[communications technology]] (such as [[smartphones]]).<ref name="uspto">{{cite web |title=Remarks by Director Iancu at the 2019 International Intellectual Property Conference |url=https://www.uspto.gov/about-us/news-updates/remarks-director-iancu-2019-international-intellectual-property-conference |website=[[United States Patent and Trademark Office]] |date=June 10, 2019 |access-date=20 July 2019 |archive-date=17 December 2019 |archive-url=https://web.archive.org/web/20191217200937/https://www.uspto.gov/about-us/news-updates/remarks-director-iancu-2019-international-intellectual-property-conference |url-status=dead }}</ref> The [[US Patent and Trademark Office]] calls it a "groundbreaking invention that transformed life and culture around the world".<ref name="uspto" />
In 1948, Bardeen and Brattain patented the progenitor of MOSFET, an insulated-gate FET (IGFET) with an inversion layer. Their patent and the concept of an inversion layer, forms the basis of CMOS technology today.<ref>{{cite book |author=Howard R. Duff |title=AIP Conference Proceedings |date=2001 |volume=550 |pages=3–32 |chapter=John Bardeen and transistor physics |doi=10.1063/1.1354371 |doi-access=free}}</ref> [[CMOS]] (complementary MOS), a semiconductor device fabrication process for MOSFETs, was developed by [[Chih-Tang Sah]] and [[Frank Wanlass]] at [[Fairchild Semiconductor]] in 1963.<ref name="computerhistory1963">{{cite web |title=1963: Complementary MOS Circuit Configuration is Invented |url=https://www.computerhistory.org/siliconengine/complementary-mos-circuit-configuration-is-invented/ |website=[[Computer History Museum]] |access-date=6 July 2019}}</ref><ref>{{US patent|3102230}}, filed in 1960, issued in 1963</ref> The first report of a [[floating-gate MOSFET]] was made by Dawon Kahng and [[Simon Sze]] in 1967.<ref>D. Kahng and S. M. Sze, "A floating gate and its application to memory devices", ''The Bell System Technical Journal'', vol. 46, no. 4, 1967, pp. 1288–1295</ref> The concept of a [[double-gate]] [[thin-film transistor]] (TFT) was proposed by H. R. Farrah ([[Bendix Corporation]]) and R. F. Steinberg in 1967.<ref name="FarrahSteinberg">{{cite journal |last1=Farrah |first1=H. R. |last2=Steinberg |first2=R. F. |date=February 1967 |title=Analysis of double-gate thin-film transistor |journal=IEEE Transactions on Electron Devices |volume=14 |issue=2 |pages=69–74 |bibcode=1967ITED...14...69F |doi=10.1109/T-ED.1967.15901}}</ref> A [[double-gate]] MOSFET was first demonstrated in 1984 by [[Electrotechnical Laboratory]] researchers Toshihiro Sekigawa and Yutaka Hayashi.<ref>{{cite book |last1=Colinge |first1=J.P. |title=FinFETs and Other Multi-Gate Transistors |date=2008 |publisher=Springer Science & Business Media |isbn=978-0-387-71751-7 |page=11 |url=https://books.google.com/books?id=t1ojkCdTGEEC&pg=PA11}}</ref><ref>{{cite journal |last1=Sekigawa |first1=Toshihiro |last2=Hayashi |first2=Yutaka |title=Calculated threshold-voltage characteristics of an XMOS transistor having an additional bottom gate |journal=Solid-State Electronics |date=1 August 1984 |volume=27 |issue=8 |pages=827–828 |doi=10.1016/0038-1101(84)90036-4 |bibcode=1984SSEle..27..827S |issn=0038-1101}}</ref> [[FinFET]] (fin field-effect transistor), a type of 3D non-planar [[Multigate device|multi-gate]] MOSFET, originated from the research of Digh Hisamoto and his team at [[Hitachi|Hitachi Central Research Laboratory]] in 1989.<ref>{{cite web |title=IEEE Andrew S. Grove Award Recipients |url=https://www.ieee.org/about/awards/bios/grove-recipients.html |archive-url=https://web.archive.org/web/20180909112404/https://www.ieee.org/about/awards/bios/grove-recipients.html |url-status=dead |archive-date=September 9, 2018 |website=[[IEEE Andrew S. Grove Award]] |publisher=[[Institute of Electrical and Electronics Engineers]] |access-date=4 July 2019}}</ref><ref>{{cite web |title=The Breakthrough Advantage for FPGAs with Tri-Gate Technology |url=https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/wp/wp-01201-fpga-tri-gate-technology.pdf |publisher=[[Intel]] |year=2014 |access-date=4 July 2019}}</ref>
==Basic information==
{{See also|Charge carrier#Majority and minority carriers}}
FETs can be majority-charge-carrier devices, in which the current is carried predominantly by majority carriers, or minority-charge-carrier devices, in which the current is mainly due to a flow of minority carriers.<ref name=millman2>{{cite book|author=Jacob Millman|author-link=Jacob Millman|title= Electronic devices and circuits|year=1985|page=397|publisher=[[S&P Global|McGraw-Hill International]]|___location=Singapore|isbn=978-0-07-085505-2}}</ref> The device consists of an active channel through which charge carriers, electrons or [[Electron hole|holes]], flow from the source to the drain. Source and drain terminal conductors are connected to the semiconductor through [[ohmic contact]]s. The conductivity of the channel is a function of the potential applied across the gate and source terminals.
The FET's three terminals are:<ref name=millman>{{cite book|author=Jacob Millman|title=Electronic devices and circuits|year=1985|pages=384–385|publisher=McGraw-Hill|___location=Singapore|isbn=978-0-07-085505-2}}</ref>
#Source (S), through which the carriers enter the channel. Conventionally, current entering the channel at S is designated by I<sub>S</sub>.
#Drain (D), through which the carriers leave the channel. Conventionally, current leaving the channel at D is designated by I<sub>D</sub>. Drain-to-source voltage is V<sub>DS</sub>.
#Gate (G), the terminal that modulates the channel conductivity. By applying voltage to G, one can control I<sub>D</sub>.
==More about terminals==
[[File:Lateral mosfet.svg|thumbnail|Cross section of an n-type MOSFET]]
All FETs have ''source'', ''drain'', and ''gate'' terminals that correspond roughly to the ''emitter'', ''collector'', and ''base'' of [[bipolar junction transistor|BJT]]s. Most FETs have a fourth terminal called the ''body'', ''base'', ''bulk'', or ''[[substrate (electronics)|substrate]].'' This fourth terminal serves to [[biasing (electronics)|bias]] the transistor into operation; it is rare to make non-trivial use of the body terminal in circuit designs, but its presence is important when setting up the [[integrated circuit layout|physical layout]] of an [[integrated circuit]]. The size of the gate, length ''L'' in the diagram, is the distance between source and drain. The ''width'' is the extension of the transistor, in the direction perpendicular to the cross section in the diagram (i.e., into/out of the screen). Typically the width is much larger than the length of the gate. A gate length of 1 μm limits the upper frequency to about 5 GHz, 0.2 μm to about 30 GHz.
The names of the terminals refer to their functions. The gate terminal may be thought of as controlling the opening and closing of a physical gate. This gate permits electrons to flow through or blocks their passage by creating or eliminating a channel between the source and drain. Electron-flow from the source terminal towards the drain terminal is influenced by an applied voltage. The body simply refers to the bulk of the semiconductor in which the gate, source and drain lie. Usually the body terminal is connected to the highest or lowest voltage within the circuit, depending on the type of the FET. The body terminal and the source terminal are sometimes connected together since the source is often connected to the highest or lowest voltage within the circuit, although there are several uses of FETs which do not have such a configuration, such as [[transmission gate]]s and [[cascode]] circuits.
Unlike BJTs, the vast majority of FETs are electrically symmetrical. The source and drain terminals can thus be interchanged in practical circuits with no change in operating characteristics or function. This can be confusing when FET's appear to be connected "backwards" in schematic diagrams and circuits because the physical orientation of the FET was decided for other reasons, such as printed circuit layout considerations.
===Effect of gate voltage on current===
[[File:JFET n-channel en.svg|thumb|upright=1.3|I–V characteristics and output plot of a JFET n-channel transistor]]
[[File:Threshold formation nowatermark.gif|thumb|right|400px|Simulation result for right side: formation of inversion channel (electron density) and left side: current-gate voltage curve (transfer characteristics) in an n-channel [[nanowire]] [[MOSFET]]. Note that the [[threshold voltage]] for this device lies around 0.45 V.]]
[[File:FET Symbols.svg|thumb|upright=1.3|FET conventional symbol types]]
The FET controls the flow of [[electron]]s (or [[electron hole]]s) from the source to drain by affecting the size and shape of a "conductive channel" created and influenced by voltage (or lack of voltage) applied across the gate and source terminals. (For simplicity, this discussion assumes that the body and source are connected.) This conductive channel is the "stream" through which electrons flow from source to drain.
====n-channel FET====
In an '''n-channel''' "depletion-mode" device, a negative gate-to-source voltage causes a [[depletion region]] to expand in width and encroach on the channel from the sides, narrowing the channel. If the active region expands to completely close the channel, the resistance of the channel from source to drain becomes large, and the FET is effectively turned off like a switch (see right figure, when there is very small current). This is called "pinch-off", and the voltage at which it occurs is called the "pinch-off voltage". Conversely, a positive gate-to-source voltage increases the channel size and allows electrons to flow easily (see right figure, when there is a conduction channel and current is large).
In an n-channel "enhancement-mode" device, a conductive channel does not exist naturally within the transistor, and a positive gate-to-source voltage is necessary to create one. The positive voltage attracts free-floating electrons within the body towards the gate, forming a conductive channel. But first, enough electrons must be attracted near the gate to counter the dopant ions added to the body of the FET; this forms a region with no mobile carriers called a [[depletion region]], and the voltage at which this occurs is referred to as the [[threshold voltage]] of the FET. Further gate-to-source voltage increase will attract even more electrons towards the gate which are able to create an active channel from source to drain; this process is called ''inversion''.
====p-channel FET====
In a '''p-channel''' "depletion-mode" device, a positive voltage from gate to body widens the depletion layer by forcing electrons to the gate-insulator/semiconductor interface, leaving exposed a carrier-free region of immobile, positively charged acceptor ions.
Conversely, in a p-channel "enhancement-mode" device, a conductive region does not exist and negative voltage must be used to generate a conduction channel.
===Effect of drain-to-source voltage on channel{{anchor|Linear mode}}===
For either enhancement- or depletion-mode devices, at drain-to-source voltages much less than gate-to-source voltages, changing the gate voltage will alter the channel resistance, and drain current will be proportional to drain voltage (referenced to source voltage). In this mode the FET operates like a variable resistor and the FET is said to be operating in a linear mode or ohmic mode.<ref>
{{cite book|author=Galup-Montoro, C.|author2=Schneider, M.C.|title=MOSFET modeling for circuit analysis and design|url=https://archive.org/details/mosfetmodelingfo00schn|url-access=limited|year=2007|page=[https://archive.org/details/mosfetmodelingfo00schn/page/n107 83]|publisher=[[World Scientific]]|___location=London/Singapore|isbn=978-981-256-810-6}}</ref><ref>{{cite book|author=Norbert R Malik|title=Electronic circuits: analysis, simulation, and design|year=1995|pages=315–316|publisher=Prentice Hall|___location=Englewood Cliffs, NJ|isbn=978-0-02-374910-0}}</ref>
If drain-to-source voltage is increased, this creates a significant asymmetrical change in the shape of the channel due to a gradient of voltage potential from source to drain. The shape of the inversion region becomes "pinched-off" near the drain end of the channel. If drain-to-source voltage is increased further, the pinch-off point of the channel begins to move away from the drain towards the source. The FET is said to be in ''saturation mode'';<ref>
{{cite book|author1=Spencer, R.R.|author2=Ghausi, M.S.|title=Microelectronic circuits|year=2001|page=102|publisher=Pearson Education/Prentice-Hall|___location=Upper Saddle River NJ|isbn=978-0-201-36183-4}}</ref> although some authors refer to it as ''active mode'', for a better analogy with bipolar transistor operating regions.<ref>
{{cite book|author1=Sedra, A. S.|author2=Smith, K.C.|title=Microelectronic circuits|url=https://archive.org/details/microelectronicc00sedr_571|url-access=limited|year=2004|edition=Fifth|page=[https://archive.org/details/microelectronicc00sedr_571/page/n581 552]|publisher=Oxford University Press|___location=New York|isbn=978-0-19-514251-8}}</ref><ref name=Gray-Mayer>
{{cite book|author1=PR Gray|author2=PJ Hurst|author3=SH Lewis|author4=RG Meyer|title=Analysis and design of analog integrated circuits|year=2001|pages=§1.5.2 p. 45|edition=Fourth|publisher=Wiley|___location=New York|isbn=978-0-471-32168-2}}</ref>{{anchor|Saturation}} The saturation mode, or the region between ohmic and saturation, is used when amplification is needed. The in-between region is sometimes considered to be part of the ohmic or linear region, even where drain current is not approximately linear with drain voltage.
Even though the conductive channel formed by gate-to-source voltage no longer connects source to drain during saturation mode, [[Charge carriers|carriers]] are not blocked from flowing. Considering again an n-channel enhancement-mode device, a [[depletion region]] exists in the p-type body, surrounding the conductive channel and drain and source regions. The electrons which comprise the channel are free to move out of the channel through the depletion region if attracted to the drain by drain-to-source voltage. The depletion region is free of carriers and has a resistance similar to [[silicon]]. Any increase of the drain-to-source voltage will increase the distance from drain to the pinch-off point, increasing the resistance of the depletion region in proportion to the drain-to-source voltage applied. This proportional change causes the drain-to-source current to remain relatively fixed, independent of changes to the drain-to-source voltage, quite unlike its ohmic behavior in the linear mode of operation. Thus, in saturation mode, the FET behaves as a [[current source|constant-current source]] rather than as a resistor, and can effectively be used as a voltage amplifier. In this case, the gate-to-source voltage determines the level of constant current through the channel.
==Composition==
FETs can be constructed from various semiconductors, out of which [[silicon]] is by far the most common. Most FETs are made by using conventional bulk
[[Semiconductor fabrication|semiconductor processing techniques]], using a [[Monocrystalline silicon|single crystal semiconductor]] [[Wafer (electronics)|wafer]] as the active region, or channel.
Among the more unusual body materials are [[amorphous silicon]], [[polycrystalline silicon]] or other amorphous semiconductors in [[thin-film transistor]]s or [[organic field-effect transistor]]s (OFETs) that are based on [[organic semiconductor]]s; often, OFET gate insulators and electrodes are made of organic materials, as well. Such FETs are manufactured using a variety of materials such as silicon carbide (SiC), gallium arsenide (GaAs), gallium nitride (GaN), and indium gallium arsenide (InGaAs).
In June 2011, IBM announced that it had successfully used [[graphene]]-based FETs in an [[integrated circuit]].<ref>{{cite news|author=Bob Yirka|url=https://phys.org/news/2011-06-ibm-graphene-based-circuit.html|title=IBM creates first graphene based integrated circuit|website=[[Phys.org]]|date=10 January 2011|access-date=14 January 2019}}</ref><ref>{{cite journal|author1=Lin, Y.-M.|author2=Valdes-Garcia, A.|author3=Han, S.-J.|author4=Farmer, D. B.|author5=Sun, Y.|author6=Wu, Y.|author7=Dimitrakopoulos, C.|author8=Grill, A |author9=Avouris, P|author10=Jenkins, K. A.|title=Wafer-Scale Graphene Integrated Circuit|doi=10.1126/science.1204428|journal=Science|volume=332|issue=6035|pages=1294–1297|year=2011|pmid=21659599|bibcode=2011Sci...332.1294L|s2cid=3020496}}</ref> These transistors are capable of about 2.23 GHz cutoff frequency, much higher than standard silicon FETs.<ref>{{cite magazine|url=http://physicsworld.com/cws/article/news/2012/dec/10/flexible-graphene-transistor-sets-new-records|title=Flexible graphene transistor sets new records|author=Belle Dumé|magazine=Physics World|date=10 December 2012|access-date=14 January 2019}}</ref>
==
[[File:FET comparison.png|right|300px|thumb|Depletion-type FETs under typical voltages: JFET, poly-silicon MOSFET, double-gate MOSFET, metal-gate MOSFET, MESFET.
{{legend|#808080|Depletion}}
{{legend|#0000FF|Electrons}}
{{legend|#FF0000|Holes}}
{{legend|#000000|Metal}}
{{legend|white|Insulator}}
Top: source, bottom: drain, left: gate, right: bulk. Voltages that lead to channel formation are not shown.]]
The channel of a FET is [[Doping (semiconductor)|doped]] to produce either an n-type [[semiconductor]] or a p-type semiconductor. The drain and source may be doped of opposite type to the channel, in the case of enhancement mode FETs, or doped of similar type to the channel as in depletion mode FETs. Field-effect transistors are also distinguished by the method of insulation between channel and gate. Types of FETs include:
*The [[MOSFET]] (metal–oxide–semiconductor field-effect transistor) utilizes an [[Electrical insulation|insulator]] (typically [[silicon dioxide|SiO<sub>2</sub>]]) between the gate and the body. This is by far the most common type of FET.
**The DGMOSFET ([[dual-gate MOSFET]]) or DGMOS, a MOSFET with two insulated gates.
**The IGBT ([[insulated-gate bipolar transistor]]) is a device for power control. It has a structure akin to a MOSFET coupled with a bipolar-like main conduction channel. These are commonly used for the 200–3000 V drain-to-source voltage range of operation. [[Power MOSFET]]s are still the device of choice for drain-to-source voltages of 1 to 200 V.
**The JLNT ([[junctionless nanowire transistor]]) is a type of field-effect transistor (FET) which channel is one or multiple nanowires and does not present any junction.
**The MNOS ([[metal–nitride–oxide–semiconductor transistor]]) utilizes a nitride-oxide layer [[Electrical insulation|insulator]] between the gate and the body.
**The [[ISFET]] (ion-sensitive field-effect transistor) can be used to measure ion concentrations in a solution; when the ion concentration (such as H<sup>+</sup>, see [[pH electrode]]) changes, the current through the transistor will change accordingly.
**The [[BioFET]] (Biologically sensitive field-effect transistor) is a class of sensors/biosensors based on [[ISFET]] technology which are utilized to detect charged molecules; when a charged molecule is present, changes in the electrostatic field at the BioFET surface result in a measurable change in current through the transistor. These include enzyme modified FETs (EnFETs), immunologically modified FETs (ImmunoFETs), gene-modified FETs (GenFETs), [[DNAFET]]s, cell-based BioFETs (CPFETs), beetle/chip FETs (BeetleFETs), and FETs based on ion-channels/protein binding.<ref>{{cite journal|author=Schöning, Michael J.|author2=Poghossian, Arshak|title=Recent advances in biologically sensitive field-effect transistors (BioFETs)|journal=Analyst|year=2002|volume=127|issue=9|pages=1137–1151|doi=10.1039/B204444G|pmid=12375833|bibcode=2002Ana...127.1137S|url=http://juser.fz-juelich.de/record/16078/files/12968.pdf}}</ref>
**The DNAFET ([[DNA field-effect transistor]]) is a specialized FET that acts as a [[biosensor]], by using a gate made of single-strand DNA molecules to detect matching DNA strands.
**[[finFET]], including [[GAAFET]] or gate-all-around FET, used on high density processor chips
*The [[JFET]] (junction field-effect transistor) uses a reverse biased p–n junction to separate the gate from the body.
**The [[static induction transistor]] (SIT) is a type of JFET with a short channel.
*The DEPFET is a FET formed in a fully depleted substrate and acts as a sensor, amplifier and memory node at the same time. It can be used as an image (photon) sensor.
*The FREDFET (fast-reverse or fast-recovery epitaxial diode FET) is a specialized FET designed to provide a very fast recovery (turn-off) of the body diode, making it convenient for driving [[Inductor|inductive]] loads such as [[electric motor]]s, especially medium-powered [[Brushless DC electric motor|brushless DC motors]].
*The HIGFET (heterostructure insulated-gate field-effect transistor) is now used mainly in research.<ref>[https://www.freepatentsonline.com/5614739.html freepatentsonline.com], HIGFET and method - Motorola]</ref>
*The MODFET (modulation-doped field-effect transistor) is a [[high-electron-mobility transistor]] using a [[quantum well]] structure formed by graded doping of the active region.
*The TFET ([[tunnel field-effect transistor]]) is based on band-to-band tunneling.<ref>{{cite journal|author=Ionescu, A. M.|author2=Riel, H.|author2-link=Heike Riel|doi=10.1038/nature10679|title=Tunnel field-effect transistors as energy-efficient electronic switches|journal=[[Nature (journal)|Nature]]|volume=479|issue=7373|pages=329–337|year=2011|pmid=22094693|bibcode=2011Natur.479..329I|s2cid=4322368}}</ref>
* The TQFET (topological quantum field-effect transistor) switches a 2D material from dissipationless [[topological insulator]] ('on' state) to conventional insulator ('off' state) using an applied electric field.<ref>{{cite web |last1=Dumé |first1=Isabelle |title=Topological off-on switch could make new type of transistor |url=https://physicsworld.com/a/topological-off-on-switch-could-make-new-type-of-transistor/ |website=Physics World |date=12 December 2018 |publisher=IOP Publishing |access-date=16 January 2022}}</ref>
*The [[HEMT]] ([[high-electron-mobility transistor]]), also called a HFET (heterostructure FET), can be made using [[Band-gap engineering|bandgap engineering]] in a ternary semiconductor such as [[AlGaAs]]. The fully depleted wide-band-gap material forms the isolation between gate and body.
*The [[MESFET]] (metal–semiconductor field-effect transistor) substitutes the [[p–n junction]] of the JFET with a [[Schottky barrier]]; and is used in GaAs and other [[III-V semiconductor]] materials.
*The [[NOMFET]] is a [[nanoparticle]] organic memory field-effect transistor.<ref>{{cite news|url=https://www.sciencedaily.com/releases/2010/01/100125122101.htm|title=Organic transistor paves way for new generations of neuro-inspired computers|work=[[ScienceDaily]]|date=January 29, 2010|access-date=January 14, 2019}}</ref>
*The GNRFET (graphene nanoribbon field-effect transistor) uses a [[Graphene nanoribbons|graphene nanoribbon]] for its channel.<ref>{{cite journal|author=Sarvari H.|author2=Ghayour, R.|author3=Dastjerdy, E.|title=Frequency analysis of graphene nanoribbon FET by Non-Equilibrium Green's Function in mode space|journal=Physica E: Low-dimensional Systems and Nanostructures|volume=43|issue=8|pages=1509–1513|year=2011|doi=10.1016/j.physe.2011.04.018|bibcode=2011PhyE...43.1509S}}</ref>
*The VeSFET (vertical-slit field-effect transistor) is a square-shaped junctionless FET with a narrow slit connecting the source and drain at opposite corners. Two gates occupy the other corners, and control the current through the slit.<ref>{{cite book|author=Jerzy Ruzyllo|title=Semiconductor Glossary: A Resource for Semiconductor Community|url=https://books.google.com/books?id=UlItDQAAQBAJ&pg=PA244|year=2016|publisher=World Scientific|isbn=978-981-4749-56-5|page=244}}</ref>
*The CNTFET ([[carbon nanotube field-effect transistor]]).
*The OFET ([[organic field-effect transistor]]) uses an organic semiconductor in its channel.
*The QFET ([[quantum field effect transistor]]) takes advantage of quantum tunneling to greatly increase the speed of transistor operation by eliminating the traditional transistor's area of electron conduction.
*The SB-FET (Schottky-barrier field-effect transistor) is a field-effect transistor with metallic source and drain contact electrodes, which create [[Schottky barrier]]s at both the source-channel and drain-channel interfaces.<ref>{{Cite journal|vauthors=Appenzeller J, etal|date=November 2008|title=Toward Nanowire Electronics|journal=IEEE Transactions on Electron Devices|volume=55|issue=11|pages=2827–2845|doi=10.1109/ted.2008.2008011|bibcode=2008ITED...55.2827A|s2cid=703393|issn=0018-9383|oclc=755663637|url=https://docs.lib.purdue.edu/nanodocs/174}}</ref><ref>{{cite journal|author=Prakash, Abhijith|author2=Ilatikhameneh, Hesameddin|author3=Wu, Peng|author4=Appenzeller, Joerg|year=2017|title=Understanding contact gating in Schottky barrier transistors from 2D channels|journal=Scientific Reports|volume=7|issue=1|page=12596|doi=10.1038/s41598-017-12816-3|pmid=28974712|pmc=5626721|arxiv=1707.01459|bibcode=2017NatSR...712596P|issn=2045-2322|oclc=1010581463}}</ref>
*The GFET is a highly sensitive graphene-based field effect transistor used as [[biosensor]]s and [[Sensor#Chemical sensor|chemical sensors]]. Due to the 2 dimensional structure of graphene, along with its physical properties, GFETs offer increased sensitivity, and reduced instances of 'false positives' in sensing applications<ref>{{cite web|author=Miklos, Bolza|title=What Are Graphene Field Effect Transistors (GFETs)?|url=https://www.graphenea.com/pages/what-are-graphene-field-effect-transistors-gfets|website=Graphenea|access-date=14 January 2019}}</ref>
*The [[Fe FET]] uses a [[ferroelectric]] between the gate, allowing the transistor to retain its state in the absence of bias - such devices may have application as [[non-volatile memory]].
* VTFET, or [[vertical-transport field-effect transistor]], IBM's 2021 modification of [[FinFET]] to allow higher density and lower power.<ref>{{Cite web|url=https://www.marktechpost.com/2021/12/21/ibm-research-unveils-vtfet-a-revolutionary-new-chip-architecture-which-is-two-times-the-performance-finfet/|title=IBM Research Unveils 'VTFET': A Revolutionary New Chip Architecture Which is Two Times the Performance finFET|first=Prathamesh|last=Ingle|date=December 21, 2021}}</ref>
==Advantages==
Field-effect transistors have high gate-to-drain current resistance, of the order of 100 MΩ or more, providing a high degree of isolation between control and flow. Because base current noise will increase with shaping time{{clarify|date=December 2021}},<ref>{{Cite web|url=http://www-physics.lbl.gov/~spieler/physics_198_notes/PDF/VIII-5-noise.pdf|title=VIII.5. Noise in Transistors}}</ref> a FET typically produces less noise than a [[bipolar junction transistor]] (BJT), and is found in noise-sensitive electronics such as tuners and [[low-noise amplifier]]s for [[VHF]] and satellite receivers. It exhibits no offset voltage at zero drain current and makes an excellent signal chopper. It typically has better thermal stability than a BJT.<ref name=millman/>
Because the FETs are controlled by gate charge, once the gate is closed or open, there is no additional power draw, as there would be with a [[bipolar junction transistor]] or with non-latching [[relay]]s in some states. This allows extremely low-power switching, which in turn allows greater miniaturization of circuits because heat dissipation needs are reduced compared to other types of switches.
==
A field-effect transistor has a relatively low [[gain–bandwidth product]] compared to a bipolar junction transistor. MOSFETs are very susceptible to overload voltages, thus requiring special handling during installation.<ref>{{cite book|author=Allen Mottershead|title=Electronic devices and siraj circuits|year=2004|publisher=Prentice-Hall of India|___location=New Delhi|isbn=978-81-203-0124-5}}</ref> The fragile insulating layer of the MOSFET between the gate and the channel makes it vulnerable to [[electrostatic discharge]] or changes to threshold voltage during handling. This is not usually a problem after the device has been installed in a properly designed circuit.
FETs often have a very low "on" resistance and have a high "off" resistance. However, the intermediate resistances are significant, and so FETs can dissipate large amounts of power while switching. Thus, efficiency can put a premium on switching quickly, but this can cause transients that can excite stray inductances and generate significant voltages that can couple to the gate and cause unintentional switching. FET circuits can therefore require very careful layout and can involve trades between switching speed and power dissipation. There is also a trade-off between voltage rating and "on" resistance, so high-voltage FETs have a relatively high "on" resistance and hence conduction losses.<ref>{{Cite web|last=Bhalla|first=Anup|date=2021-09-17|title=Origins of SiC FETs and Their Evolution Toward the Perfect Switch|url=https://www.powerelectronicsnews.com/origins-of-sic-fets-and-their-evolution-toward-the-perfect-switch/|access-date=2022-01-21|website=Power Electronics News|language=en-US}}</ref>
==
Field-effect transistors are relatively robust, especially when operated within the temperature and electrical limitations defined by the manufacturer (proper [[derating]]). However, modern FET devices can often incorporate a [[body diode]]. If the characteristics of the body diode are not taken into consideration, the FET can experience slow body diode behavior, where a parasitic transistor will turn on and allow high current to be drawn from drain to source when the FET is off.<ref>[https://www.dfrsolutions.com/hubfs/Resources/Slow_Body_Diode_Failures.pdf?t=1513022462214 Slow Body Diode Failures of Field Effect Transistors (FETs): A Case Study].</ref>
==
{{unreferenced section|date=September 2018}}
The most commonly used FET is the [[MOSFET]]. The [[CMOS]] (complementary metal oxide semiconductor) process technology is the basis for modern [[Digital data|digital]] [[integrated circuit]]s. This [[Semiconductor device fabrication|process technology]] uses an arrangement where the (usually "enhancement-mode") p-channel MOSFET and n-channel MOSFET are connected in series such that when one is on, the other is off.
In FETs, electrons can flow in either direction through the channel when operated in the linear mode. The naming convention of drain terminal and source terminal is somewhat arbitrary, as the devices are typically (but not always) built symmetrical from source to drain. This makes FETs suitable for switching analog signals between paths ([[multiplexing]]). With this concept, one can construct a solid-state [[mixing board]], for example.
FET is commonly used as an amplifier. For example, due to its large input resistance and low output resistance, it is effective as a buffer in [[common-drain]] (source follower) configuration.
IGBJTs are used in switching internal combustion engine ignition coils, where fast switching and voltage blocking capabilities are important.
==Source-gated transistor==
Source-gated transistors are more robust to manufacturing and environmental issues in large-area electronics such as display screens, but are slower in operation than FETs.<ref>{{cite journal|author=Sporea, R.A.|author2=Trainor, M.J.|author3=Young, N.D.|author4=Silva, S.R.P.|title=Source-gated transistors for order-of-magnitude performance improvements in thin-film digital circuits|journal=Scientific Reports|year=2014|volume=4|page=4295|doi=10.1038/srep04295|pmid = 24599023|pmc=3944386|bibcode=2014NatSR...4E4295S}}</ref>
==See also==
*[[Chemical field-effect transistor]]
*[[CMOS]]
*
*[[Field effect (semiconductor)]]
*[[FinFET]]
*[[FlowFET]]
*[[Multigate device]]
==References==
{{Reflist|30em}}
==External links==
{{Commons category|Field-effect Transistors}}
*[
*[https://www.wecanfigurethisout.org/VL/MOS_kit.htm How Semiconductors and Transistors Work (MOSFETs)] WeCanFigureThisOut.org
*[https://www.radio-electronics.com/info/data/semicond/fet-field-effect-transistor/junction-jfet-basics-tutorial.php Junction Field Effect Transistor]
*[
*[https://web.archive.org/web/20120717015116/http://www.analog.com/library/analogDialogue/archives/35-05/latchup/ Winning the Battle Against Latchup in CMOS Analog Switches]
*[https://www.freescale.com/files/rf_if/doc/app_note/AN211A.pdf Field Effect Transistors in Theory and Practice]
*[
*{{cite web|date=March 30, 2013 |title=The FET (field effect transistor)|url=https://www.youtube.com/watch?v=SjeK1nkiFvI|via=[[YouTube]]|publisher=rolinychupetin (L.R.Linares)}}
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