Open Verification Methodology: Difference between revisions

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OVM testbenches are written by unqualified verification pinheads, overdosing, foaming at the mouth, high from breathing their own exhaust fumes too much...devoid of common sense, logic, or reasoning... throwing trash everywhere in their path, disorganizing, making reusable lies over and over...like the ink cartage that cost more than the printer...

The '''Open Verification Methodology''' (OVM) is a documented [[methodology]] with a supporting building-block library for the verification of semiconductor chip designs. The initial version, OVM 1.0, was released in January, 2008,<ref>[http://www.ovmworld.org/press_release_010908.php OVM 1.0 Announcement]</ref>, and regular updates have expanded its functionality. The latest version is OVM 2.1.2, released in January, 2011. The current release and all previous releases are available, under the [[Apache License]], on the OVM World<ref>[http://www.ovmworld.org OVM World]</ref> site.

The reuse concepts within the OVM were derived mainly from the URM (Universal Reuse Methodology (URM) which was, to a large part, based on the [[ERM (e Reuse Methodology)|eRM]] (e Reuse MethodologyERM) for the [[e (verification language)|e Verification Language]] developed by Verisity Design in 2001. The OVM also brings in concepts from the AVM (Advanced Verification Methodology (AVM). The [[Universal Verification Methodology|UVM]] class library brings much automation to the [[SystemVerilog]] language such as sequences and data automation features (packing, copy, compare), etc.). The UVM also has recommendations for code packaging and naming conventions.

I liken OVM/UVM/TLM testbenches to the way HP printers become more and more retarded looking each year until nobody wants to buy their junky retarded halfworking printers anymore...then HP wises-up and throws out the dummies that are destroying their products with retarded bloated angular designs amd dumbass web services that nobody wants...then, the cycle starts all over again by making square printers that print well... Eventually they firing the good people again and replacing them with dummies... Then you have the next OVM moment...

==OVM Bolongie==

The '''Open Verification Methodology''' (OVM) is a documented [[methodology]] with a supporting building-block library for the verification of semiconductor chip designs. The initial version, OVM 1.0, was released in January, 2008<ref>[http://www.ovmworld.org/press_release_010908.php OVM 1.0 Announcement]</ref>, and regular updates have expanded its functionality. The latest version is OVM 2.1.2, released in January, 2011. The current release and all previous releases are available, under the [[Apache License]], on the OVM World<ref>[http://www.ovmworld.org OVM World]</ref> site.

The reuse concepts within the OVM were derived mainly from the URM (Universal Reuse Methodology) which was, to a large part, based on the [[ERM (e Reuse Methodology)|eRM]] (e Reuse Methodology) for the [[e (verification language)|e Verification Language]] developed by Verisity Design in 2001. The OVM also brings in concepts from the AVM (Advanced Verification Methodology (AVM). The UVM class library brings much automation to the SystemVerilog language such as sequences and data automation features (packing, copy, compare) etc. The UVM also has recommendations for code packaging and naming conventions.

The OVM has won recognition from [[Electronic Design Magazine]]<ref>[http://electronicdesign.com/article/eda/fpga-designers-see-some-of-eda-s-best-work-in-2007.aspx Electronic Design Article]</ref> and a DesignVision award from the International Engineering Consortium<ref>[http://www.iec.org/about/020508_dv_winners.html DesignVision Award]</ref>.

The OVM was co-developed by [[Mentor Graphics]] and [[Cadence Design Systems]], and they continue to guide its evolution in concert with the nine user companies of the OVM Advisory Group<ref>[http://www.eetimes.com/showArticle.jhtml?articleID=209904287 OVM Advisory Group]</ref>. The OVM is publicly supported by more than 60 partner companies<ref>[http://www.ovmworld.org/partners.php OVM Partners]</ref> offering tools, training, and services.

The OVM was standardized within [[Accellera]], which voted to make it the basis for the [[Universal Verification Methodology]] (UVM)<ref>[http://www.accellera.org/activities/vip/VIP-TC_standard_effort_update_Jan_2010.pdf Relationship to the UVM]</ref>. Accellera released version UVM 1.0 EA on May 17, 2010 <ref>[http://www.accellera.org/activities/vip Accellera Download]</ref>..

==References==

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{{Reflist}}

==External links==

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* [http://www.edaplayground.com EDA Playground] - run OVM simulations from a web browser (free online IDE)

*[http://www.accellera.org/activities/vip/VIP-TC_standard_effort_update_Jan_2010.pdf OVM Relationship to the UVM]

[[Category:DesignElectronic design automation]]

[[Category:Graphics]]