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{{Short description|Computing technique employed to achieve parallelism}}
{{Flynn's Taxonomy}}
[[Image:MIMD.svg|right|225px]]
In [[computing]], '''
MIMD architectures may be used in a number of application areas such as [[computer-aided design]]/[[computer-aided manufacturing]], [[Computer simulation|simulation]], [[Scientific modelling|modeling]], and as [[communication switches]]. MIMD machines can be of either [[Shared memory (interprocess communication)|shared memory]] or [[distributed memory]] categories. These classifications are based on how MIMD processors access memory. Shared memory machines may be of the [[Bus network|bus-based]], extended, or [[hierarchical#Computation and electronics|hierarchical]] type. Distributed memory machines may have [[Grid network|hypercube]] or [[Mesh networking|mesh]] interconnection schemes. ==Examples==
An example of MIMD system is [[
Most parallel computers, as of 2013, are MIMD systems.<ref>{{cite web|url=http://software.intel.com/en-us/articles/mimd |title=MIMD | Intel® Developer Zone |access-date=2013-10-16 |url-status=dead |archive-url=https://web.archive.org/web/20131016215430/http://software.intel.com/en-us/articles/mimd |archive-date=2013-10-16 }}</ref>
==Shared
From a programmer's point of view, this memory model is better understood than the distributed memory model. Another advantage is that memory coherence is managed by the operating system and not the written program. Two known disadvantages are: scalability beyond thirty-two processors is difficult, and the shared memory model is less flexible than the distributed memory model.<ref name="Ibaroudene-slides"/>
There are many examples of shared memory (multiprocessors): UMA ([[
===Bus-based===
MIMD machines with shared memory have processors which share a common, central memory. In the simplest form, all processors are attached to a bus which connects them to memory. This means that every machine with shared memory shares a specific CM, common bus system for all the clients.
For example, if we consider a bus with clients A, B, C connected on one side and P, Q, R connected on the opposite side,
any one of the clients will communicate with the other by means of the bus interface between them.
=== Hierarchical ===
MIMD machines with hierarchical shared memory use a hierarchy of buses (as, for example, in a "[[fat tree]]") to give processors access to each other's memory. Processors on different boards may communicate through inter-nodal buses. Buses support communication between boards. With this type of architecture, the machine may support over
== Distributed memory ==
In distributed memory MIMD (multiple instruction, multiple data) machines, each processor has its own individual memory ___location. Each processor has no direct knowledge about other processor's memory. For data to be shared, it must be passed from one processor to another as a message. Since there is no shared memory, contention is not as great a problem with these machines. It is not economically feasible to connect a large number of processors directly to each other. A way to avoid this multitude of direct connections is to connect each processor to just a few others. This type of design can be inefficient because of the added time required to pass a message from one processor to another along the message path. The amount of time required for processors to perform simple message routing can be substantial. Systems were designed to reduce this time loss and [[Connection Machine|hypercube]] and [[Mesh networking|mesh]] are among two of the popular interconnection schemes.
Examples of distributed memory (multiple computers) include [[Massively parallel (computing)|MPP (massively parallel processors)]], [[Computer cluster|COW (clusters of workstations)]] and NUMA ([[non-uniform memory access]]). The former is complex and expensive: Many super-computers coupled by broad-band networks. Examples include hypercube and mesh interconnections. COW is the "home-made" version for a fraction of the price.<ref name=tanenbaum/>
===Hypercube interconnection network===
In an MIMD distributed memory machine with a [[hypercube]] system interconnection network containing four processors, a processor and a memory module are placed at each vertex of a square. The diameter of the system is the minimum number of steps it takes for one processor to send a message to the processor that is the farthest away. So, for example, the diameter of a 2-cube is
===Mesh interconnection network===
In an MIMD distributed memory machine with a mesh interconnection network, processors are placed in a two-dimensional grid. Each processor is connected to its four immediate neighbors.
==See also==
* [[Symmetric multiprocessing|SMP]]▼
* [[Non-Uniform Memory Access|NUMA]]▼
* [[Flynn's taxonomy]]
* [[MapReduce]]
▲* [[Non-Uniform Memory Access|NUMA]]
▲* [[Symmetric multiprocessing|SMP]]
* [[SPMD]]
* [[Superscalar]]
* [[Torus interconnect]]
* [[Very long instruction word]]
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{{CPU technologies}}
{{Parallel computing}}
{{Authority control}}
[[Category:Flynn's taxonomy]]
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