C form-factor pluggable: Difference between revisions

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The '''C form-factor pluggable''' ('''CFP''', '''100G form factor pluggable''', where ''C'' is {{langx|la|[[wikt:centum|centum]]}} "hundred")<ref name="CFP1.4"/> is a [[multi-source agreement]] to produce a common form-factor for the transmission of high-speed digital signals. The c stands for the Latin letter C used to express the number 100 (''centum''), since the standard was primarily developed for [[100 Gigabit Ethernet]] systems.

==CFP standardization==

The CFP transceiver is specified by a [[multi-source agreement]] (MSA) betweenamong competing manufacturers.<ref>{{cite web|url=http://www.cfp-msa.org/|website=CFP MSA|accessdate=24 April 2018|title=CFP Multi-Source Agreement}}</ref> The CFP was designed after the [[smallSmall formForm-factor pluggablePluggable transceiver]] (SFP) interface, but is significantly larger to support 100&nbsp;Gbit/s. While the electrical connection of a CFP uses {{nowrap|10 x× 10 Gbit/s}} lanes in each direction (RX, TX),<ref name="CFP1.4">{{Cite web | title=CFP MSA Hardware Specification, Rev. 1.4 | url=http://www.cfp-msa.org/Documents/CFP-MSA-HW-Spec-rev1-40.pdf | accessdate=2010-07-02}}</ref> the optical connection can support both {{nowrap|10 x× 10 Gbit/s}} and {{nowrap|4 x× 25 Gbit/s}} variants of 100&nbsp;Gbit/s interconnects (typically referred to as 100GBASE-SR10 in 100 &nbsp;meter [[multi-mode optical fiber|MMF]], 100GBASE-LR10 and 100GBASE-LR4 in 10&nbsp;km [[single-mode optical fiber|SMF]] reach, and 100GBASE-ER10 and 100GBASE-ER4 in 40&nbsp;km SMF reach respectively.)<ref>{{Cite web | title=Operational Considerations for Deploying 100 Gigabit Ethernet | url=http://www.nanog.org/meetings/nanog51/presentations/Monday/NANOG51.Talk32.hankins-nanog51-100-gbe.pdf | accessdate=2012-01-12}}</ref>

In March 2009, [[Santur Corporation]] demonstrated a 100 &nbsp;Gigabit pluggable CFP transceiver prototype.<ref>{{cite web |title= Santur Delivers the World’sWorld's First 100Gb/s Transceiver Platform for Client Connectivity Based on Photonic Intelligent Integration |url=http://www.santurcorp.com/pressrel_03-23-09b.htm |date= March 23, 2009 |work= news release |archiveurl= https://web.archive.org/web/20090927163337/http://www.webcitationsanturcorp.orgcom/5iQH3sIGwpressrel_03-23-09b.htm |archivedate=September July 2027, 2009 |deadurlurl-status=yesdead |accessdate= May 27, 2013 }}</ref>

==Supported signals==

===Digital===

CFP transceivers can support a single 100&nbsp;Gbit/s signal like [[100 Gigabit Ethernet|100GbE]] or [[Optical Transport Network|OTU4]] or one or more 40&nbsp;Gbit/s signals like 40GbE, [[OTU3]], or [[STM-256]]/[[OC-768]].

===Analog===

The [[Optical Internetworking Forum]] in 2016 published the CFP2-ACO or CFP2 - Analog Coherent Optics Module Interoperability Agreement (IA). This IA supports a configuration where the [[digital signal processor]] (DSP) is on the main board and analog optical components are on the module. This IA is useful in the case when the DSP exceeds the module power envelope.<ref>{{Cite web |url=http://www.oiforum.com/wp-content/uploads/OIF-CFP2-ACO-01.0.pdf |title=OIF-CFP2-ACO-01.0 |date=2016-01-22 |accessdate=2017-05-08 |archive-url=https://web.archive.org/web/20171215155031/http://www.oiforum.com/wp-content/uploads/OIF-CFP2-ACO-01.0.pdf |archive-date=2017-12-15 |url-status=dead }}</ref>

The ACO interface can be used in coherent optics applications when the link delivers a flexible amount of bandwidth to the system, for example when combined with [[FlexE]]. The initial ACO IA is for the CFP2 module.

==Variants==

The original CFP specification was proposed at a time when 10Gbps10&nbsp;Gbit/s signals were far more achievable than 25Gbps25&nbsp;Gbit/s signals. As such to achieve 100Gbps100&nbsp;Gbit/s line rate, the most affordable solution was based on 10 lanes of 10Gbps10&nbsp;Gbit/s. However, as expected, improvements in technology hashave allowed higher performance and higher density. Hence the development of the CFP2 and CFP4 specifications. While electricalelectrically similar, they specify a form-factor of 1/2 and 1/4 respectively in size of the original specification. Note that CFP, CFP2 and CFP4 modules are not interchangeable (but would beare inter-operable at the optical interface with appropriate connectors).

=== CFP<ref name="CFP1.4" /> ===

* 82&nbsp;mm × 13.6&nbsp;mm × 144.8&nbsp;mm (width×height×depth)

* 148 pin electrical connection

* integrated digital signal processor within package

* less than 24W24 [[Watt|W]] power usage

* 10x10G10×10G or 4x58G4×25G lanes<ref name="CFP1.4" />

=== CFP2 ===

=== CFP2<ref>{{Cite web | title=CFP2 MSA Hardware Specification, Rev. 1.0 | url=http://www.cfp-msa.org/Documents/CFP2_HW-Spec-rev1.0.pdf | accessdate=2015-04-17}}</ref>===

* 41.5&nbsp;mm × 12.4&nbsp;mm × 107.5&nbsp;mm (w×h×d)

* 104 pin electrical connection

* noDefault/ACO digitalversion signal(Analog Coherent Optics): no processorDSP in packagemodule, relies on host card

* DCO version (Digital Coherent Optics): DSP in module

* less than 12w power usage

* 10x10Gless orthan 4x25G12 orW 8x25Gpower lanesusage

===* 10×10G, 4×25G, 8×25G, or 8×50G lanes CFP2<ref>{{Cite web | title=CFP2 MSA Hardware Specification, Rev. 1.0 | url=http://www.cfp-msa.org/Documents/CFP2_HW-Spec-rev1.0.pdf | accessdate=2015-04-17}}</ref>===

=== CFP4 ===

=== CFP4<ref>{{Cite web | title=CFP4 MSA Hardware Specification, Rev. 1.0 | url=http://www.cfp-msa.org/Documents/CFP2_HW-Spec-rev1.0.pdf | accessdate=2015-04-17}}</ref> ===

* 21.5&nbsp;mm × 9.5&nbsp;mm × 92&nbsp;mm (w×h×d)

* 56 pin electrical connection

* no digital signal processor in package, relies on host card

* less than 6w6 W power usage

===* 4×10G or 4×25G lanes CFP4<ref>{{Cite web | title=CFP4 MSA Hardware Specification, Rev. 1.0 | url=http://www.cfp-msa.org/Documents/CFP2_HWCFP-MSA_CFP4_HW-Spec-rev1.0.pdf | accessdate=2015-0405-1706}}</ref> ===

* 10x10G or 4x25G lanes

=== CFP8 ===

=== MSA 5"x7" (Gen 1)<ref>{{Cite web | title=Optical Integration and the Role of DSP in

* 40&nbsp;mm × 9.5&nbsp;mm × 102&nbsp;mm (w×h×d)

Coherent Optics Modules | url=http://www.ofcconference.org/library/images/ofc/2014/Market%20Watch%20and%20SPS/4-Srivastava-Market-Watch-OFC2013.pdf | accessdate=2015-04-17}}</ref> ===

* 168124 pin electrical connection (design for being built into line card)

* no digital signal processor in package, relies on host card

* lessmax. than24 12wW power usage

* 16×25G lanes (25.78125 or 26.5625 GBd) or 8×50G lanes <ref>{{Cite web | title=CFP8 Hardware Specification, Rev. 1.0 | date=2017-03-17 | url=http://www.cfp-msa.org/Documents/CFP-MSA_CFP8_HW-Spec-rev1p0.pdf | accessdate=2022-02-09}}</ref>

=== MSA 5″×7″ (Gen 1) ===

* 168 pin electrical connection (designed to be built into a line card)

* digital signal processor within package

* less than 80 W power usage <ref>{{Cite web | title=Optical Integration and the Role of DSP in Coherent Optics Modules | url=http://www.ofcconference.org/library/images/ofc/2014/Market%20Watch%20and%20SPS/4-Srivastava-Market-Watch-OFC2013.pdf | accessdate=2015-04-17}}</ref><ref>{{Cite web | title=Multisource Agreement for Generation 2.0 100G Long-Haul DWDM Transmission Module – Electromechanical | url=http://www.oiforum.com/public/documents/OIF-MSA-100GLH-EM-02.0.pdf | accessdate=2015-04-17 | archive-url=https://web.archive.org/web/20150418103505/http://www.oiforum.com/public/documents/OIF-MSA-100GLH-EM-02.0.pdf | archive-date=2015-04-18 | url-status=dead }}</ref>

* less than 80w power usage

=== MSA 4"x5"4″×5″ (Gen 2) ===

* 168 pin electrical connection (designdesigned forto beingbe built into a line card)

* digital signal processor within package

* less than 40w40 W power usage

==See also==

* [[Small form-factor pluggable transceiver]] (SFP)

* [[QSFP]]

* [[CXP (connector)]]

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==External links==

* [http://www.cfp-msa.org CFP Committee website]

{{Ethernet}}