Push–pull output: Difference between revisions

Revision as of 06:21, 9 April 2021

Revision as of 07:01, 9 April 2021

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== Digital circuits ==

[[File:7400 Circuit.svg|right|thumb|Circuit of [[TTL]] [[NAND gate]] has a 'totem pole output' stage ''(right)'' consisting of two NPN transistors in push pull. When transistor ''V''₂ is turned off, ''V''₃ is turned on and ''V''₄ off, pulling output voltage high. When ''V''₂ is on, ''V''₃ is off and ''V''₄ is turned on, pulling output low.]]

[[File:7400 Circuit.svg|right|thumb|The TTL output stage is a rather complicated push–pull circuit known as a 'totem pole output' (the transistors, diode, and resistor in the right-most slice of this TTL [[logic gate]] circuit). It sinks currents better than it sources current.]]

A digital use of a push–pull configuration is the output of TTL and related families. The upper transistor is functioning as an active pull-up, in linear mode, while the lower transistor works digitally. For this reason they are not capable of supplying as much current as they can ''sink'' (typically 20 times less). Because of the way these circuits are drawn schematically, with two transistors stacked vertically, normally with a level shifting diode in between, they are called "'''totem pole'''" outputs.

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=== Push–pull transistor output stages ===

[[File:Aura VA 100 Evolution 2 (4061759992) - closeup of output stage.jpg|thumb|upright=1.5|Push pullTypical transistor output stage of one channel of a 65 watt stereo amplifier from 1993. The 2 MOSFET push-pull output transistors (''FET2, FET4'') are bolted to the black [[heat sink]]. They are driven by transistors ''Q2, Q5, Q6,'' and ''Q7'']]

{{refimprove section|date=November 2012}}

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