Compressed instruction set: Difference between revisions

Revision as of 22:22, 9 April 2021

Revision as of 22:22, 9 April 2021

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In the 1980s, when the RISC concept was first emerging, this was a common point of complaint. As the system would have to spend more time reading instructions from memory, it was suggested that this might actually slow the program down. Extensive [[benchmarking]] eventually demonstrated RISC was faster in almost all cases, and this argument faded. However, there are cases where memory use remains a concern regardless of performance, and that is in small systems and embedded applications. Even in the early 2000s, the price of [[DRAM]] was enough that cost-sensitive devices had limited memory. It was for this market that [[Hitachi]] developed the [[SuperH]] design, the first to implement code compression.<ref>{{cite web |url=http://resource.renesas.com/lib/eng/e_learnig/sh4/02/index.html |title=Effects of 16-bit instructions |website=Renesas}}</ref>

In the SuperH, instructions take up 16-bits. The resulting instruction set has real-world limitations; for instance, it can only perform two-operand math of the form {{code|A {{=}} A + B}}, whereas most processors of the era allowed {{code|A {{=}} B {{+}} C}}, the three-operand format. By removing one operand, four bits are removed from the instruction (there are 16 registers, not 32), although this is at the cost of making math code somewhat more complex to write. For the markets targeted by the SuperH, this was an easy tradeoff to make. A significant advantage of the 16-bit format is that the [[instruction cache]] now holds twice as many instructions for any given amount of [[SRAM]]. This allows the system to perform at higher speeds, although some of that might be mitigated by the use of additional instructions needed to complete code that a 3-operand format allowed.{{sfn|SuperH|1996}}

ARM licensed a number of Hitachi's patents on aspects of the instruction design and used them to implement their Thumb instructions. ARM processors with a "T" in the name included this instruction set in addition to the original 32-bit versions, and could be switched from 32 to 16-bit mode on the fly using the {{code|BX}} command. When in Thumb mode, only the top eight registers of the ARM's normal sixteen registers are visible, but these are the same registers and thus data can be passed between Thumb and normal code using them. Every Thumb instruction was a counterpart of a 32-bit version, so Thumb was a strict subset of the original ISA.{{sfn|Lemieux|2004}} One key difference between ARM's model and SuperH is that Thumb retains more instructions in the three-operand format, which it accomplished by reducing the register file so only 3-bits are required to select a register.<ref>{{cite web |url=https://developer.arm.com/documentation/ddi0210/c/Introduction/Instruction-set-summary/Thumb-instruction-summary?lang=en |title=Thumb instruction summary |website=ARM7TDMI Technical Reference Manual}}</ref>