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Guy Harris (talk | contribs) Put simply: not all machines with predicated instructions have a condition code register - MIPS added conditional moves in MIPS IV, but it has no condition code register, so the move is done only if another register specified in the instruction is zero (MOVZ) or non-zero (MOVN). |
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|date= 2000-04-26 |accessdate= 2014-04-22
|author= Rick Vinyard |website= cs.nmsu.edu
}}</ref> The instructions from the taken path are permitted to modify architectural state because they have been associated (''predicated'') with a ''predicate'', a [[Boolean data type|Boolean value]] used by the instruction to control whether the instruction is allowed to modify the architectural state or not. If the predicate specified in the instruction is true, the instruction modifies the architectural state; otherwise, the architectural state is unchanged. For example, a predicated move instruction (a conditional move) will only modify the destination if the predicate is true.
[[Vector processors]], some [[SIMD]] ISAs (such as [[AVX2]] and [[AVX-512]]) and [[GPU]]s in general make heavy use of predication, applying one bit of a conditional ''mask Vector'' to the corresponding elements in the Vector registers being processed, whereas scalar predication in scalar instruction sets only need the one predicate bit. Where Predicate Masks become particularly powerful in [[Vector processing]] is if an ''array'' of [[Condition_code_register|Condition Codes]], one per Vector element, may feed back into Predicate Masks that are then applied to subsequent Vector instructions.
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