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Guy Harris (talk | contribs) Those are all branch instructions; no need to list them all individually. (Yes, a subroutine call or return is a branch, and a "branch table" is something that contains targets of branches.) This makes it a bit clearer that predication isn't implemented with branches, it's an *alternative* to branches. (And, yes, the next sentence needs to be fixed to make it clearer that it replaces branches.) |
Guy Harris (talk | contribs) First try at making it clearer that predication *removes* branches. This probably needs more work. |
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{{More citations needed|date=March 2014}}
{{Distinguish|Branch prediction}}
In [[computer science]], '''predication''' is an [[computer architecture|architectural]] feature that provides an alternative to conditional transfer of [[control flow|control]], as implemented by conditional [[branch (computer science)|branch]] [[instruction (computer science)|machine instructions]]. Predication works by
|url= https://www.cs.nmsu.edu/~rvinyard/itanium/predication.htm
|title= Predication
|date= 2000-04-26 |accessdate= 2014-04-22
|author= Rick Vinyard |website= cs.nmsu.edu
}}</ref>
[[Vector processors]], some [[SIMD]] ISAs (such as [[AVX2]] and [[AVX-512]]) and [[GPU]]s in general make heavy use of predication, applying one bit of a conditional ''mask Vector'' to the corresponding elements in the Vector registers being processed, whereas scalar predication in scalar instruction sets only need the one predicate bit. Where Predicate Masks become particularly powerful in [[Vector processing]] is if an ''array'' of [[Condition_code_register|Condition Codes]], one per Vector element, may feed back into Predicate Masks that are then applied to subsequent Vector instructions.
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