Symmetric multiprocessing: Difference between revisions

Content deleted Content added
Citation bot (talk | contribs)
Alter: title. Add: edition. | Use this bot. Report bugs. | Suggested by Whoop whoop pull up | #UCB_webform 613/2035
Rescuing 1 sources and tagging 0 as dead.) #IABot (v2.0.8.6) (Whoop whoop pull up - 9645
Line 28:
| date = September 1968
| url = http://www.bitsavers.org/pdf/ibm/360/funcChar/A22-6884-3_360-65_funcChar.pdf}}</ref> and 67–2.<ref>{{cite book
|publisher publisher = IBM
|title title = IBM System/360 Model 67 Functional Characteristics
|id id = GA27-2719-2
|url url = http://www.bitsavers.org/pdf/ibm/360/funcChar/GA27-2719-2_360-67_funcChar.pdf
|version version = Third Edition
|date = February 1972
| date = February 1972}}</ref> The operating systems that ran on these machines were [[OS/360]] M65MP<ref>[http://doi.acm.org/10.1145/800186.810634 M65MP: An Experiment in OS/360 multiprocessing]</ref> and [[TSS/360]]. Other software developed at universities, notably the [[Michigan Terminal System]] (MTS), used both CPUs. Both processors could access data channels and initiate I/O. In OS/360 M65MP, peripherals could generally be attached to either processor since the operating system kernel ran on both processors (though with a "big lock" around the I/O handler).<ref>{{cite book |url=http://bitsavers.org/pdf/ibm/360/os/R21.7_Apr73/plm/GY28-6616-9_OS_IO_Superv_PLM_R21.7_Apr73.pdf |title=Program Logic Manual, OS I/O Supervisor Logic, Release 21 (R21.7) |publisher=IBM |id=GY28-6616-9 |edition=Tenth |date=April 1973}}</ref> The MTS supervisor (UMMPS) has the ability to run on both CPUs of the IBM System/360 model 67–2. Supervisor locks were small and used to protect individual common data structures that might be accessed simultaneously from either CPU.<ref>[https://1a9f2076-a-62cb3a1a-s-sites.googlegroups.com/site/michiganterminalsystem/documentation/documents/timeSharingSupervisorPrograms-1971.pdf?attachauth=ANoY7crPBadRVtxTmN8sqSjFc3xC84Q_pDpvpRo7VRWz0_Ql-UKQ2SVe6hJ7lVOjGZbLkOSXco8c9_ZI6TmQZS8EpBTMlByIPM4iByyUXlXE__YfWN0jqwIQglhyvR0oSxl0I_C0JenDItLzN4btLtkug9HSHRX1s-WtlkSQ-pzJLpczJYsuzTvZVIggSTW0arjTnQsls6xcrCsMcyl58Y98Q0Sw2yecmFLiTcYjnYrgAhLGSu9b2s28oV04R6_6p6fD8UUjvnRawHn7N6qFgRIEuGj4QuZlkthZM5_fZwaPyXvLxccgLCk%3D&attredirects=0 ''Time Sharing Supervisor Programs''] by Mike Alexander (May 1971) has information on MTS, TSS, CP/67, and Multics</ref>
|access-date = 2013-04-12
|archive-date = 2012-03-14
|archive-url = https://web.archive.org/web/20120314102752/http://www.bitsavers.org/pdf/ibm/360/funcChar/GA27-2719-2_360-67_funcChar.pdf
|url-status = dead
| date = February 1972}}</ref> The operating systems that ran on these machines were [[OS/360]] M65MP<ref>[http://doi.acm.org/10.1145/800186.810634 M65MP: An Experiment in OS/360 multiprocessing]</ref> and [[TSS/360]]. Other software developed at universities, notably the [[Michigan Terminal System]] (MTS), used both CPUs. Both processors could access data channels and initiate I/O. In OS/360 M65MP, peripherals could generally be attached to either processor since the operating system kernel ran on both processors (though with a "big lock" around the I/O handler).<ref>{{cite book |url=http://bitsavers.org/pdf/ibm/360/os/R21.7_Apr73/plm/GY28-6616-9_OS_IO_Superv_PLM_R21.7_Apr73.pdf |title=Program Logic Manual, OS I/O Supervisor Logic, Release 21 (R21.7) |publisher=IBM |id=GY28-6616-9 |edition=Tenth |date=April 1973}}</ref> The MTS supervisor (UMMPS) has the ability to run on both CPUs of the IBM System/360 model 67–2. Supervisor locks were small and used to protect individual common data structures that might be accessed simultaneously from either CPU.<ref>[https://1a9f2076-a-62cb3a1a-s-sites.googlegroups.com/site/michiganterminalsystem/documentation/documents/timeSharingSupervisorPrograms-1971.pdf?attachauth=ANoY7crPBadRVtxTmN8sqSjFc3xC84Q_pDpvpRo7VRWz0_Ql-UKQ2SVe6hJ7lVOjGZbLkOSXco8c9_ZI6TmQZS8EpBTMlByIPM4iByyUXlXE__YfWN0jqwIQglhyvR0oSxl0I_C0JenDItLzN4btLtkug9HSHRX1s-WtlkSQ-pzJLpczJYsuzTvZVIggSTW0arjTnQsls6xcrCsMcyl58Y98Q0Sw2yecmFLiTcYjnYrgAhLGSu9b2s28oV04R6_6p6fD8UUjvnRawHn7N6qFgRIEuGj4QuZlkthZM5_fZwaPyXvLxccgLCk%3D&attredirects=0 ''Time Sharing Supervisor Programs''] by Mike Alexander (May 1971) has information on MTS, TSS, CP/67, and Multics</ref>
 
Other mainframes that supported SMP included the [[UNIVAC 1100/2200 series#1108|UNIVAC 1108 II]], released in 1965, which supported up to three CPUs, and the [[GE-600 series|GE-635 and GE-645]],<ref>{{cite book|url=http://www.bitsavers.org/pdf/ge/GE-6xx/CPB-371A_GE-635_System_Man_Jul64.pdf|title=GE-635 System Manual|date=July 1964|publisher=[[General Electric]]}}</ref><ref>{{cite book|url=http://www.bitsavers.org/pdf/ge/GE-645/GE-645_SystemMan_Jan68.pdf|title=GE-645 System Manual|date=January 1968|publisher=General Electric}}</ref> although [[GECOS]] on multiprocessor GE-635 systems ran in a master-slave asymmetric fashion, unlike [[Multics]] on multiprocessor GE-645 systems, which ran in a symmetric fashion.<ref>{{cite newsgroup|url=https://groups.google.com/d/msg/alt.folklore.computers/v-hkdKaPTXc/MX7UI3DgOokJ|title=Fear of Multiprocessing?|author=Richard Shetron|date=May 5, 1998|newsgroup=alt.folklore.computers|message-id=354e95a9.0@news.wizvax.net}}</ref>