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Address decoders are fundamental building blocks for systems that use [[Bus (computing)|buses]]. They are represented in all integrated circuit families and processes and in all standard [[FPGA]] and [[Application-specific integrated circuit|ASIC]] libraries. They are discussed in introductory textbooks in digital logic design.<ref name="TAoE"/>
== Address decoder selects the storage cell in a memory ==
An address decoder is a commonly used component in microelectronics that is used to select memory cells in randomly addressable memory devices.
==References==
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