Address decoder: Difference between revisions

Revision as of 20:50, 21 February 2022

Revision as of 20:51, 21 February 2022

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An address decoder is a commonly used component in microelectronics that is used to select memory cells in randomly addressable memory devices.

Such a memory cell consists of a fixed number of memory elements or bits . The address decoder is connected to an address bus and reads the address created there. Using a special switching logic, it uses this address to calculate which memory cell is to be accessed. It then selects that cell by selecting it via a special control line. This line is also known as the select line. In dynamic memories (DRAM), there are row and column select lines on the memory matrix, which are controlled by address decoders integrated in the chip.

Depending on the type of decoder, the logic used to select the memory cell can under certain circumstances be programmable.

== Address decoder selects the appropriate memory module ==

An address decoder is also used to select the appropriate one of multiple memory modules or memory chips when a particular address is provided by the processor system's address bus.

==References==