Predication (computer architecture): Difference between revisions

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Besides eliminating branches, less code is needed in total, provided the architecture provides predicated instructions. While this does not guarantee faster execution in general, it will if the <tt>dosomething</tt> and <tt>dosomethingelse</tt> blocks of code are short enough.

Predication's simplest form is ''partial predication'', where the architecture has ''conditional move'' or ''conditional select'' instructions. Conditional move instructions write the contents of one register over another only if the predicate's value is true, whereas conditional select instructions choose which of two registers has its contents written to a third based on the predicate's value. A more generalized and capable form is ''full predication''. Full predication has a set of predicate registers for storing predicates (which allows multiple nested or sequential branches to be simultaneously eliminated) and most instructions in the architecture have a register specifier field to specify which predicate register supplies the predicate.<ref>{{cite journalbook |last1=Mahlke|first1=Scott A.|last2=Hank|first2=Richard E.|last3=McCormick|first3=James E.|last4=August|first4=David I.|last5=Hwn|first5=Wen-mei W.|titlechapter=A Comparison of Full and Partial Predicated Execution Support for ILP Processors |journaltitle=The 22nd International Symposium on Computer Architecture|date=, 22–24 June 1995 |year=1995 |doi=10.1145/223982.225965 |isbn=0-89791-698-0 |citeseerx=10.1.1.19.3187}}</ref>

==Advantages==

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==Disadvantages==

Predication's primary drawback is in increased encoding space. In typical implementations, every instruction reserves a bitfield for the predicate specifying under what conditions that instruction should have an effect. When available memory is limited, as on [[embedded system|embedded devices]], this space cost can be prohibitive. However, some architectures such as [[Thumb-2]] are able to avoid this issue (see below). Other detriments are the following:<ref name="Fisher04">{{cite book |first=Joseph A. |last=Fisher, |first2=Paolo |last2=Faraboschi, |first3=Cliff |last3=Young (|year=2004) ''|chapter= |title=Embedded Computing -— A VLIW Approach to Architecture, Compilers, and Tools''. Page |page=172 |chapter-url=https://www.google.com/books/edition/Embedded_Computing/DbOa0p1wRD4C?hl=en&gbpv=1&pg=PA172 |chapter=4.5.2 Predication § Predication in the Embedded Domain |isbn=9780080477541 |publisher=Elsevier}}</ref>

*Predication complicates the hardware by adding levels of [[control unit|logic]] to critical [[datapath|paths]] and potentially degrades clock speed.

*A predicated block includes cycles for all operations, so shorter [[control-flow graph|paths]] may take longer and be penalized.

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==Further reading==

*{{cite book|first=Alan |last=Clements|title=Computer Organization & Architecture: Themes and Variations |chapter=8.3.7 Predication |chapter-url={{google books|id=ySILAAAAQBAJ&pg=PA532|plainurl=yes}}|year=2013|publisher=Cengage Learning|isbn=1-285-41542-6|pages=532-539532–9}}

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