Transaction-level modeling: Difference between revisions

Revision as of 06:44, 20 May 2022

Revision as of 17:54, 6 June 2022

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However, the application of transaction-level modeling is not specific to the SystemC language and can be used with other languages. The concept of TLM first appears in system level language and modeling ___domain.<ref>L. Cai, D. Gajski, Transaction Level Modeling: An Overview, in proceedings of the Int. Conference on HW/SW Codesign and System Synthesis (CODES-ISSS), Oct. 2003, pp. 19–24</ref>

TtransactionTransaction-level models are used for [[high-level synthesis]] of [[register-transfer level]] (RTL) models for a lower-level modelling and implementation of system components. RTL is usually represented by a [[hardware description language]] source code (e.g. [[VHDL]], [[SystemC]], [[Verilog]]).{{r|TVLSIHB-2007|pp=1955-1957}}

==History==