Atmel AVR instruction set: Difference between revisions

Revision as of 02:13, 2 June 2022

Revision as of 04:06, 6 June 2022

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Architectures other than AVR1 are named according to avr-libc conventions.<ref name="avr-libc-gnu-archname">{{cite web|title=Using the GNU tools|url=https://www.nongnu.org/avr-libc/user-manual/using_tools.html|website=AVR Libc Manual|accessdate=6 May 2018}}</ref>

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! Family

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! scope=row | Reduced AVRtiny Core ("avrtiny10")

| {{ublist|ATtiny40|ATtiny20|ATtiny10|ATtiny9|ATtiny5|ATtiny4}}

| (Identical to minimal core, except for reduced CPU register set{{note label|reduced|Register set reduced to R16 through R31.{{ref|isa_manual}}|α}})

| (Identical to classic core with up to 8K, except for reduced CPU register set{{note label|reduced|Register set reduced to R16 through R31.{{ref|isa_manual}}|α}})

| Identical to classic core with up to 8K, with the following exceptions:{{aligned table|cols=2|col1style=font-family:monospace;|LPM|(removed)|LDD|(removed)|STD|(removed)|LD|(also accesses program memory)|LDS|(different bit pattern)|STS|(different bit pattern)||Reduced CPU register set{{note label|reduced|Register set reduced to R16 through R31.{{ref|isa_manual}}|α}}}}

| (Identical to enhanced core with up to 128K, except for reduced CPU register set{{note label|reduced|Register set reduced to R16 through R31.{{ref|isa_manual}}|α}})

|}