Holdover in synchronization applications: Difference between revisions

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Two independent clocks, once synchronized, will walk away from one another without limit.<ref name="smartclock">{{cite journal|url=http://tf.nist.gov/general/pdf/988.pdf |title=Smart Clock: A New Time |publisher=[[IEEE]] |date=1992-12-06 |access-date=2012-10-21}}</ref> To have them display the same time it would be necessary to re-synchronize them at regular intervals. The period between synchronizations is referred to as '''holdover''' and performance under holdover relies on the quality of the reference oscillator, the PLL design, and the correction mechanisms employed.<ref name="analog1">{{cite web|url=http://www.analog.com/static/imported-files/application_notes/AN-1002.pdf |title=AN-1002 (Rev. 0) |access-date=2012-09-28}}</ref>