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SMP systems are ''[[multiprocessing#Processor coupling|tightly coupled multiprocessor]] systems'' with a pool of homogeneous processors running independently of each other. Each processor, executing different programs and working on different sets of data, has the capability of sharing common resources (memory, I/O device, interrupt system and so on) that are connected using a [[system bus]] or a [[crossbar switch|crossbar]].
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== Design ==
SMP systems have centralized [[Shared memory architecture|shared memory]] called ''main memory'' (MM) operating under a single [[operating system]] with two or more homogeneous processors. Usually each processor has an associated private high-speed memory known as [[cache memory]] (or cache) to speed up the main memory data access and to reduce the system bus traffic.
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