Systolic array: Difference between revisions

Revision as of 20:01, 19 May 2023

Revision as of 20:02, 19 May 2023

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==See also==

* [[Multiple instruction, single data|MISD]] – Multiplemultiple Instructioninstruction Singlesingle Datadata, Exampleexample: Systolicsystolic Arraysarrays

* [[iWarp]] – Systolicsystolic Arrayarray Computercomputer, VLSI, Intel/CMU

* [[WARP (systolic array)]] – Systolicsystolic Arrayarray Computercomputer, GE/CMU

* [[Tensor Processing Unit]] – [[AI]] accelerator [[ASIC]]