Cache placement policies: Difference between revisions

Revision as of 09:02, 23 May 2023

Revision as of 20:41, 14 November 2023

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{{Short description|Design decisions affecting processor cache speeds and sizes}}

{{Distinguish|cache replacement policies}}

'''Cache placement policies''' are policies that determine where a particular memory block can be placed when it goes into a [[CPU cache]]. A block of memory cannot necessarily be placed at an arbitrary ___location in the cache; it may be restricted to a particular [[CPU cache#Cache entries|cache line]] or a set of cache lines<ref name=":0">{{Cite web|url=https://cseweb.ucsd.edu/classes/su07/cse141/cache-handout.pdf|title=The Basics of Cache}}</ref> by the cache's placement policy.<ref>{{Cite web |title=Cache Placement Policies |url=http://web.cs.iastate.edu/~prabhu/Tutorial/CACHE/bl_place.html |titlearchive-url=Cachehttps://web.archive.org/web/20200221213947/http://web.cs.iastate.edu/~prabhu/Tutorial/CACHE/bl_place.html Placement|archive-date=Feb Policies21, 2020}}</ref><ref>{{Cite web|url=http://fourier.eng.hmc.edu/e85_old/lectures/memory/node4.html|title=Placement Policies|archive-url=https://web.archive.org/web/20200814000302/http://fourier.eng.hmc.edu/e85_old/lectures/memory/node4.html|archive-date=August 14, 2020|url-status=dead}}</ref>

There are three different policies available for placement of a memory block in the cache: direct-mapped, fully associative, and set-associative. Originally this space of cache organizations was described using the term "congruence mapping".<ref>{{Cite journal|last=Mattson|first=R.L.|author1-link=Richard Mattson|last2=Gecsei|first2=J.|last3=Slutz|first3=D. R.|last4=Traiger|first4=I|date=1970|title= Evaluation Techniques for Storage Hierarchies|journal=IBM Systems Journal|volume=9|issue=2|pages=78–117|doi=10.1147/sj.92.0078}}</ref>