Dynamic frequency scaling: Difference between revisions

Revision as of 11:23, 4 June 2023

Revision as of 16:19, 19 June 2023

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[[ACPI]] 1.0 (1996) defines a way for a CPU to go to idle "C states", but defines no frequency-scaling system.

ACPI 2.0 (2000) introduces a system of ''P states'' (power-performance states) that a processor can use to communicate its possible frequency&ndash;power settings to the OS. The operating system then sets the speed as needed by switching between these states. SpeedStep, PowerNow!/Cool'n'Quiet, and PowerSaver all work through P states. There is a limit of 16 states maximum.<ref>{{cite web

| url = http://www.acpi.info/DOWNLOADS/ACPIspec30.pdf

| title = Advanced Configuration and Power Interface Specification, Revision&nbsp;3.0, Section&nbsp;2.6 Device and Processor Performance State Definitions

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}}</ref>

ACPI 5.0 (2011) introduces collaborative processor performance control (CPPC)., Insteadexposing hundreds of askingperformance forlevels a specific performance level,to the OS can ask for aselection range of levels, leavingin the CPUform to do its own frequency selection. On Intel and AMD CPUs,of a "efficiency/performance preferencelevel" furtherabstracted hintsaway tofrom the CPUfrequency. asThis toabstraction ''how''provides tosome doleeway for the selection.processor Windowsto andadjust Linuxits offerworkings supportin forways CPPCother onthan newerjust AMDthe and Intel CPUsfrequency.<ref>{{cite web |title=Collaborative Processor Performance Control (CPPC) — The Linux Kernel documentation |url=https://www.kernel.org/doc/html/latest/admin-guide/acpi/cppc_sysfs.html |website=www.kernel.org}}</ref><ref>{{cite web |title=8.4. Declaring Processors |url=https://uefi.org/htmlspecs/ACPI_Spec_6_4_html/08_Processor_Configuration_and_Control/declaring-processors.html#collaborative-processor-performance-control |website=ACPI Specification 6.4 documentation}}</ref><ref>{{cite web |title=Overview about power and performance tuning for the Windows Server |url=https://learn.microsoft.com/en-us/windows-server/administration/performance-tuning/hardware/power/power-performance-tuning |website=learn.microsoft.com |language=en-us |date=29 August 2022}}</ref>

=== Autonomous frequency scaling ==

A number of modern CPUs can perform frequency scaling autonomously, using a performance level range and a "efficiency/performance preference" hint from the OS.

* Intel CPUs starting with [[Skylake (microarchitecture)|Skylake]] support ''hardware-managed P-states'', using a [[model-specific register]] as the control channel.<ref>{{man|8|x86_energy_perf_policy|Linux}}</ref><ref>{{cite web |title=intel_pstate CPU Performance Scaling Driver — The Linux Kernel documentation |url=https://www.kernel.org/doc/html/v4.19/admin-guide/pm/intel_pstate.html |website=www.kernel.org}}</ref>

* AMD CPUs starting with [[Zen 2]] supports a similar feature. Unlike the Intel feature, it depends on CPPC being enabled. The preferred communication channel is a MSR (different from the Intel one) introduced in Zen 3; Zen 2 units use the ACPI AML method.<ref>{{cite web |title=amd-pstate CPU Performance Scaling Driver — The Linux Kernel documentation |url=https://docs.kernel.org/admin-guide/pm/amd-pstate.html |website=docs.kernel.org}}</ref>

==Performance impact==