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Early MOS logic had one transistor type, which is [[enhancement mode]] so that it can act as a logic switch. Since suitable resistors were hard to make, the logic gates used saturated loads; that is, to make the one type of transistor act as a load resistor, the transistor had to be turned always on by tying its gate to the power supply (the more negative rail for [[PMOS logic]], or the more positive rail for [[NMOS logic]]). Since the current in a device connected that way goes as the square of the voltage across the load, it provides poor pullup speed relative to its power consumption when pulled down. A resistor (with the current simply proportional to the voltage) would be better, and a current source (with the current fixed, independent of voltage) better yet. A [[depletion-mode]] device with gate tied to the opposite supply rail is a much better load than an enhancement-mode device, acting somewhere between a resistor and a current source.
The first depletion-load NMOS circuits were pioneered and made by the [[Dynamic random-access memory|DRAM]] manufacturer [[Mostek]], which made depletion-mode transistors available for the design of the original [[Zilog Z80]] in 1975–76.<ref>''Zilog relied on [[Mostek]] and [[Synertek]] to produce the Z80 and other chips before their own production facilities were ready.''</ref> Mostek had the [[ion implantation]] equipment needed to create a [[doping (semiconductor)|doping profile]] more precise than possible with [[diffusion]] methods, so that the [[threshold voltage]] of the load transistors could be adjusted reliably. At Intel, depletion load was introduced in 1974 by Federico Faggin, an ex-Fairchild engineer and later the founder of [[Zilog]]. Depletion-load was first employed for a redesign of one of Intel's most important products at the time, a +5V-only 1Kbit NMOS [[Static random-access memory|SRAM]] called the ''2102'' (using more than 6000 transistors<ref>''Each bit demands six transistors in a typical [[static RAM]].''</ref>). The result of this redesign was the significantly faster ''2102A'', where the highest performing versions of the chip had access times of less than 100ns, taking MOS memories close to the speed of bipolar RAMs for the first time.<ref>''See for instance: http://www.intel4004.com/sgate.htm or http://archive.computerhistory.org/resources/text/Oral_History/Faggin_Federico/Faggin_Federico_1_2_3.oral_history.2004.102658025.pdf'' {{Webarchive|url=https://web.archive.org/web/20170110232713/http://archive.computerhistory.org/resources/text/Oral_History/Faggin_Federico/Faggin_Federico_1_2_3.oral_history.2004.102658025.pdf |date=2017-01-10 }}</ref>
Depletion-load NMOS processes were also used by several other manufacturers to produce many incarnations of popular 8-bit, 16-bit, and 32-bit CPUs. Similarly to early PMOS and NMOS CPU designs using [[Channel (transistor)|enhancement mode]] MOSFETs as loads, depletion-load nMOS designs typically employed various types of [[dynamic logic (digital
A large number of support and peripheral ICs were also implemented using (often static) depletion-load based circuitry. However,
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