Atmel AVR instruction set: Difference between revisions

Revision as of 00:41, 20 October 2023

Revision as of 00:50, 20 October 2023

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* S7 and S12 are 7-bit and 12-bit ''signed'' displacements, in units of words, relative to the program address stored in the program counter

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ADD Rd, Rr

ADC Rd, Rr

ADIW Rp+1:Rp, K6

SUB Rd, Rr

SUBI Rdh, K8

SBC Rd, Rr

SBCI Rdh, K8

SBIW Rp+1:Rp, K6

INC Rd

DEC Rd

AND Rd, Rr

ANDI Rdh, K8

OR Rd, Rr

ORI Rdh, K8

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<S> CLR Rd </S> (EOR)

<S> SER Rdh </S> (LDI)

<S> SBR Rdh, K8 </S> (ORI)

<S> CBR Rdh, K8 </S> (ANDI)

<S> TST Rd </S> (AND)

!-->

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COM Rd

NEG Rd

CP Rd, Rr

CPC Rd, Rr

CPI Rdh, K8

SWAP Rd

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<S> LSL Rd </S> (ADD) !--><!--

LSR Rd <!--

<S> ROL Rd </S> (ADC) !-->

ROR Rd

ASR Rd

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MUL Rd, Rr

LSR Rd

MULS Rdh, Rrh

ROR Rd

MULSU Rdq, Rrq

ASR Rd

FMUL Rdq, Rrq

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FMULS Rdq, Rrq

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MUL Rd, Rr

MULS Rdh, Rrh

MULSU Rdq, Rrq

FMUL Rdq, Rrq

FMULS Rdq, Rrq

FMULSU Rdq, Rrq

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BSET s

BCLR s

SBI IO5, b

CBI IO5, b

BST Rd, b

BLD Rd, b

NOP

NOP

BREAK

SLEEP

WDR

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MOV Rd, Rr

MOVW Rd+1:Rd, Rr+1:Rr

IN Rd, IO6

OUT IO6, Rr

PUSH Rr

POP Rr

LDI Rdh, K8

LDS Rd, D16

LD Rd, X

LDD Rd, YZ+K6
LD Rd, -XYZ

LD Rd, -XYZ +

LD Rd, XYZ+

STS D16, Rr

STS D16, Rr

ST XYZ+X, Rr

STSTD XYZ+K6, Rr

STDST YZ+K6 -XYZ, Rr

ST -XYZ+, Rr

ST XYZ+, Rr

LPM

LPM Rd, Z

LPM Rd, Z +

ELPM

LPM Rd, Z+

ELPM Rd, Z

ELPM Rd, Z +

ELPM Rd, Z+

SPM

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RJMP S12

IJMP

IJMP

EIJMP

JMP P22

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CPSE Rd, Rr

SBRC Rr, b

SBRS Rr, b

SBIC IO5, b

SBIS IO5, b

BRBC s, S7

BRBS s, S7

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RCALL S12

ICALL

EICALL

CALL P22

RET

RET

RETI

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