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* In programming models such as [[CUDA]] designed for [[data parallel computation]], an array of threads run [[compute kernel|the same code]] in parallel using only its ID to find its data in memory. In essence, the application must be designed so that each thread performs the same operation on different segments of memory so that they can operate in parallel and use the GPU architecture.
* [[Hardware description language]]s such as [[Verilog]] have a different threading model that supports extremely large numbers of threads (for modeling hardware).
== References ==
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