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=== Inclusion policies ===
[[File:Inclusivecache.png|thumb|Inclusive cache organization|413x413px|alt=a memory system diagram showing a copy of the L1 within L2 and a copy of the L2 within L3.]]
Whether a block present in the upper cache layer can also be present in the lower cache level is governed by the memory system's [[Cache inclusion policy|inclusion policy]], which may be inclusive, exclusive or non-inclusive non-exclusive (NINE).<ref name=":0">{{Cite book|title=Fundamentals of Parallel Computer Architecture|last=Solihin|first=Yan|publisher=Solihin Publishing|year=2009|isbn=9780984163007|pages=Chapter 6: Introduction to Memory Hierarchy Organization}}</ref>
With an inclusive policy, all the blocks present in the upper-level cache have to be present in the lower-level cache as well. Each upper-level cache component is a subset of the lower-level cache component. In this case, since there is a duplication of blocks, there is some wastage of memory. However, checking is faster.<ref name=":0" />
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