Content deleted Content added
Eatingbugs (talk | contribs) m Excess whitespace |
→Classic problems: I legit want to know what (hardware) "primitive" refers to here. I'm missing some context trying to google it |
||
Line 48:
A single processor or [[uniprocessor system]] could disable [[interrupt]]s by executing currently running code without [[Preemption (computing)|preemption]], which is very inefficient on [[Multiprocessing|multiprocessor]] systems.<ref name="Wiley2014">{{cite book|last1=Silberschatz|first1=Abraham|last2=Gagne|first2=Greg|last3=Galvin|first3=Peter Baer|title=Operating System Concepts|date=July 11, 2008|publisher=John Wiley & Sons.|isbn=978-0-470-12872-5|edition=Eighth|chapter=Chapter 6: Process Synchronization}}</ref>
"The key ability we require to implement synchronization in a multiprocessor is a set of [[Hardware primitive|hardware primitives]] with the ability to atomically read and modify a memory ___location. Without such a capability, the cost of building basic synchronization primitives will be too high and will increase as the processor count increases. There are a number of alternative formulations of the basic hardware primitives, all of which provide the ability to atomically read and modify a ___location, together with some way to tell if the read and write were performed atomically. These hardware primitives are the basic building blocks that are used to build a wide variety of user-level synchronization operations, including things such as [[Lock (computer science)|locks]] and [[Barrier (computer science)|barriers]]. In general, architects do not expect users to employ the basic hardware primitives, but instead expect that the primitives will be used by system programmers to build a synchronization library, a process that is often complex and tricky."<ref name="Morgan2011">{{cite book|last1=Hennessy|first1=John L.|last2=Patterson|first2=David A.|title=Computer Architecture: A Quantitative Approach|date=September 30, 2011|publisher=Morgan Kaufmann|isbn=978-0-123-83872-8|edition=Fifth|chapter=Chapter 5: Thread-Level Parallelism}}</ref> Many modern pieces of hardware provide such atomic instructions, two common examples being: [[test-and-set]], which operates on a single memory word, and [[compare-and-swap]], which swaps the contents of two memory words.
==Support in programming languages==
|