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==== Internal registers ====
{| class="infobox" style="font-size:88%;width:38em;"
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|+ AVR registers
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{| style="font-size:88%;"
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| style="width:10px; text-align:center;"| <sup>2</sup><sub>1</sub>
| style="width:10px; text-align:center;"| <sup>2</sup><sub>0</sub>
| style="width:10px; text-align:center;"| <sup>1</sup><sub>9</sub>
| style="width:10px; text-align:center;"| <sup>1</sup><sub>8</sub>
| style="width:10px; text-align:center;"| <sup>1</sup><sub>7</sub>
| style="width:10px; text-align:center;"| <sup>1</sup><sub>6</sub>
| style="width:10px; text-align:center;"| <sup>1</sup><sub>5</sub>
| style="width:10px; text-align:center;"| <sup>1</sup><sub>4</sub>
| style="width:10px; text-align:center;"| <sup>1</sup><sub>3</sub>
| style="width:10px; text-align:center;"| <sup>1</sup><sub>2</sub>
| style="width:10px; text-align:center;"| <sup>1</sup><sub>1</sub>
| style="width:10px; text-align:center;"| <sup>1</sup><sub>0</sub>
| style="width:10px; text-align:center;"| <sup>0</sup><sub>9</sub>
| style="width:10px; text-align:center;"| <sup>0</sup><sub>8</sub>
| style="width:10px; text-align:center;"| <sup>0</sup><sub>7</sub>
| style="width:10px; text-align:center;"| <sup>0</sup><sub>6</sub>
| style="width:10px; text-align:center;"| <sup>0</sup><sub>5</sub>
| style="width:10px; text-align:center;"| <sup>0</sup><sub>4</sub>
| style="width:10px; text-align:center;"| <sup>0</sup><sub>3</sub>
| style="width:10px; text-align:center;"| <sup>0</sup><sub>2</sub>
| style="width:10px; text-align:center;"| <sup>0</sup><sub>1</sub>
| style="width:10px; text-align:center;"| <sup>0</sup><sub>0</sub>
| style="width:auto; background:white; color:black" | ''(bit position)''
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|colspan="21" | '''Main registers''' <br />
|- style="background:silver;color:black"
| style="text-align:center; background:white" colspan="6"|
| style="text-align:center;" colspan="8"| R1
| style="text-align:center;" colspan="8"| R0
|- style="background:silver;color:black"
| style="text-align:center; background:white" colspan="6"|
| style="text-align:center;" colspan="8"| R3
| style="text-align:center;" colspan="8"| R2
|- style="background:silver;color:black"
| style="text-align:center; background:white" colspan="6"|
| style="text-align:center;" colspan="8"| R5
| style="text-align:center;" colspan="8"| R4
|- style="background:silver;color:black"
| style="text-align:center; background:white" colspan="6"|
| style="text-align:center;" colspan="8"| R7
| style="text-align:center;" colspan="8"| R6
|- style="background:silver;color:black"
| style="text-align:center; background:white" colspan="6"|
| style="text-align:center;" colspan="8"| R9
| style="text-align:center;" colspan="8"| R8
|- style="background:silver;color:black"
| style="text-align:center; background:white" colspan="6"|
| style="text-align:center;" colspan="8"| R11
| style="text-align:center;" colspan="8"| R10
|- style="background:silver;color:black"
| style="text-align:center; background:white" colspan="6"|
| style="text-align:center;" colspan="8"| R13
| style="text-align:center;" colspan="8"| R12
|- style="background:silver;color:black"
| style="text-align:center; background:white" colspan="6"|
| style="text-align:center;" colspan="8"| R15
| style="text-align:center;" colspan="8"| R14
|- style="background:silver;color:black"
| style="text-align:center; background:white" colspan="6"|
| style="text-align:center;" colspan="8"| R17
| style="text-align:center;" colspan="8"| R16
|- style="background:silver;color:black"
| style="text-align:center; background:white" colspan="6"|
| style="text-align:center;" colspan="8"| R19
| style="text-align:center;" colspan="8"| R18
|- style="background:silver;color:black"
| style="text-align:center; background:white" colspan="6"|
| style="text-align:center;" colspan="8"| R21
| style="text-align:center;" colspan="8"| R20
|- style="background:silver;color:black"
| style="text-align:center; background:white" colspan="6"|
| style="text-align:center;" colspan="8"| R23
| style="text-align:center;" colspan="8"| R22
|- style="background:silver;color:black"
| style="text-align:center; background:white" colspan="6"|
| style="text-align:center;" colspan="8"| R25
| style="text-align:center;" colspan="8"| R24
|- style="background:silver;color:black"
| style="text-align:center; background:white" colspan="6"|
| style="text-align:center;" colspan="8"| R27
| style="text-align:center;" colspan="8"| R26
| style="background:white; color:black;"| '''X''' (pointer)
|- style="background:silver;color:black"
| style="text-align:center; background:white" colspan="6"|
| style="text-align:center;" colspan="8"| R29
| style="text-align:center;" colspan="8"| R28
| style="background:white; color:black;"| '''Y''' (pointer)
|- style="background:silver;color:black"
| style="text-align:center; background:white" colspan="6"|
| style="text-align:center;" colspan="8"| R31
| style="text-align:center;" colspan="8"| R30
| style="background:white; color:black;"| '''Z''' (pointer)
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|colspan="21" | '''Stack pointer''' <br />
|- style="background:silver;color:black"
| style="text-align:center; background:white" colspan="6"|
| style="text-align:center;" colspan="8"| SPH
| style="text-align:center;" colspan="8"| SPL
| style="background:white; color:black;"| [[Call stack|'''S'''tack '''P'''ointer]]
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|colspan="21" | '''Program counter''' <br />
|- style="background:silver;color:black"
| style="text-align:center;" colspan="22"| PC
| style="background:white; color:black;"| [[Program counter|'''P'''rogram '''C'''counter]]
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|colspan="21" | '''Extended memory''' <br />
|- style="background:silver;color:black"
| style="text-align:center; background:white" colspan="14"|
| style="text-align:center;" colspan="8"| RAMPZ
| style="background:white; color:black;"| Extended Z
|- style="background:silver;color:black"
| style="text-align:center; background:white" colspan="14"|
| style="text-align:center;" colspan="8"| EIND
| style="background:white; color:black;"| Extended indirect
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In the tinyAVR and megaAVR variants of the [[Atmel AVR instruction set|AVR architecture]], the working registers are mapped in as the first 32 data memory addresses (0000<sub>16</sub>–001F<sub>16</sub>), followed by 64 I/O registers (0020<sub>16</sub>–005F<sub>16</sub>). In devices with many peripherals, these registers are followed by 160 “extended I/O” registers, only accessible as [[memory-mapped I/O]] (0060<sub>16</sub>–00FF<sub>16</sub>).
|colspan="21" | '''Status register'''
|- style="background:silver;color:black"
| style="text-align:center; background:white" colspan="14"|
| style="text-align:center;"| [[Interrupt flag|I]]
| style="text-align:center;"| T
| style="text-align:center;"| [[Half-carry flag|H]]
| style="text-align:center;"| [[Sign flag|S]]
| style="text-align:center;"| [[Overflow flag|V]]
| style="text-align:center;"| [[Sign flag|N]]
| style="text-align:center;"| [[Zero flag|Z]]
| style="text-align:center;"| [[Carry flag|C]]
| style="background:white; color:black" | SREG
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In the tinyAVR and megaAVR variants of the AVR architecture, the working registers are mapped in as the first 32 data memory addresses (0000<sub>16</sub>–001F<sub>16</sub>), followed by 64 I/O registers (0020<sub>16</sub>–005F<sub>16</sub>). In devices with many peripherals, these registers are followed by 160 “extended I/O” registers, only accessible as [[memory-mapped I/O]] (0060<sub>16</sub>–00FF<sub>16</sub>).
Actual SRAM starts after these register sections, at address 0060<sub>16</sub> or, in devices with "extended I/O", at 0100<sub>16</sub>.
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