Compressed instruction set: Difference between revisions

Revision as of 23:17, 19 December 2023

Revision as of 08:15, 22 July 2024

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==Concept==

[[Microprocessor]]s encode their instructions as a series of [[bit]]s, normally divided into a number of 8-bit [[byte]]s. For instance, in the [[MOS 6502]], the {{code|ADC}} instruction performs binary addition between an operand value and the value already stored in the [[Accumulator (computing)|accumulator]]. There are a variety of places the processor might find the operand; it might be located in [[main memory]], or in the special [[zero page]], or be an explicit constant like "10". Each of these variations used a different 8-bit instruction, or [[opcode]]; if one wanted to add the constant 10 to the accumulator the instruction would be encoded in memory as {{code|$69 $0A}}, with $0A being [[hexadecimal]] for the decimal value 10. If it was instead adding the value stored in main memory at ___location $4400, it would be {{code|$6D $004400 $44}}, with a [[Endianness|little-endian]] address.{{sfn|Verts|2004}}

Note that the second instruction requires three bytes because the memory address is 16 bits long. Depending on the instruction, it might use one, two, or three bytes.{{sfn|Verts|2004}} This is now known as a [[variable length instruction set]], although that term was not common at the time as most processors, including [[mainframe]]s and [[minicomputer]]s, normally used some variation of this concept. Even in the late 1970s, as microprocessors began to move from 8-bit formats to 16, this concept remained common; the [[Intel 8088]] continued to use 8-bit opcodes which could be followed by zero to six additional bytes depending on the [[addressing mode]].<ref>{{cite magazine |title=Understanding ARM Architectures |url=https://www.informit.com/articles/article.aspx?p=1620207&seqNum=3 |date=23 August 2010 |website=informIT}}</ref>