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** Synchronous/asynchronous serial peripherals ([[Universal asynchronous receiver/transmitter|UART]]/USART) (used with [[RS-232]], [[RS-485]], and more)
** [[Serial Peripheral Interface Bus]] (SPI)
** Universal Serial Interface (USI): a multi-purpose hardware communication module that can be used to implement an SPI,<ref>{{cite web|url=http://www.atmel.com/images/doc2582.pdf |archive-url=https://web.archive.org/web/20120617084714/http://www.atmel.com/images/doc2582.pdf |archive-date=2012-06-17 |url-status=live|title=AVR319: Using the USI module for SPI communication|date=2004|publisher=[[Atmel]]|access-date=10 June 2014}}</ref> I<sup>2</sup>C<ref>{{cite web|url=http://www.atmel.com/images/atmel-2561-using-the-usi-module-as-a-i2c-master_ap-note_avr310.pdf |archive-url=https://web.archive.org/web/20140714124026/http://www.atmel.com/images/atmel-2561-using-the-usi-module-as-a-i2c-master_ap-note_avr310.pdf |archive-date=2014-07-14 |url-status=live|title=Atmel AVR310: Using the USI Module as a I<sup>2</sup>C Master|date=2013|publisher=[[Atmel]]|access-date=10 June 2014}}</ref><ref>{{cite web|url=http://www.atmel.com/Images/doc2560.pdf |archive-url=https://web.archive.org/web/20140714214646/http://www.atmel.com/Images/doc2560.pdf |archive-date=2014-07-14 |url-status=live|title=AVR312: Using the USI module as a I<sup>2</sup>C slave|date=2005|publisher=[[Atmel]]|access-date=10 June 2014}}</ref> or UART<ref>{{cite web|url=http://www.atmel.com/Images/doc4300.pdf |archive-url=https://web.archive.org/web/20140714141508/http://www.atmel.com/Images/doc4300.pdf |archive-date=2014-07-14 |url-status=live|title=AVR307: Half Duplex UART Using the USI Module|date=2003|publisher=[[Atmel]]|access-date=10 June 2014}}</ref> interface.
* [[Brownout (electricity)|Brownout]] detection
* [[Watchdog timer]] (WDT)
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== Programming interfaces ==
<!--NOTE: This section was originally started by copying http://en.wikibooks.org/wiki/Embedded_Systems/Atmel_AVR#Programming_Interfaces on February 20, 2011 -->
There are many means to load program code into an AVR chip. The methods to program AVR chips varies from AVR family to family. Most of the methods described below use the <span style="text-decoration: overline">RESET</span> line to enter programming mode. In order to avoid the chip accidentally entering such mode, it is advised to connect a pull-up resistor between the <span style="text-decoration: overline">RESET</span> pin and the positive power supply.<ref>{{cite web|url=http://www.atmel.com/images/atmel-2521-avr-hardware-design-considerations_applicationnote_avr042.pdf |archive-url=https://web.archive.org/web/20141222084848/http://www.atmel.com/Images/Atmel-2521-AVR-Hardware-Design-Considerations_ApplicationNote_AVR042.pdf |archive-date=2014-12-22 |url-status=live|title=AVR Hardware Design Considerations|date=Jun 2015|publisher=Atmel Corporation|page=5|type=application note|access-date=14 Jun 2015|quote=The reset line has an internal pull-up resistor, but if the environment is noisy it can be insufficient and reset can therefore occur sporadically.}}</ref>
=== ISP ===
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=== PDI ===
The Program and Debug Interface (PDI) is an Atmel proprietary interface for external programming and on-chip debugging of XMEGA devices. The PDI supports high-speed programming of all non-volatile memory (NVM) spaces; flash, EEPROM, fuses, lock-bits and the User Signature Row. This is done by accessing the XMEGA NVM controller through the PDI interface, and executing NVM controller commands. The PDI is a 2-pin interface using the Reset pin for clock input (PDI_CLK) and a dedicated data pin (PDI_DATA) for input and output.<ref>{{cite web|url=http://ww1.microchip.com/downloads/en/AppNotes/doc8282.pdf |archive-url=https://web.archive.org/web/20200325021625/http://ww1.microchip.com/downloads/en/AppNotes/doc8282.pdf |archive-date=2020-03-25 |url-status=live|title=PDI programming driver|access-date=2012-09-19}}</ref>
=== UPDI ===
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=== Bootloader ===
Most AVR models can reserve a [[bootloader]] region, 256 bytes to 4 KB, where re-programming code can reside. At reset, the bootloader runs first and does some user-programmed determination whether to re-program or to jump to the main application. The code can re-program through any interface available, or it could read an encrypted binary through an Ethernet adapter like [[Preboot Execution Environment|PXE]]. Atmel has application notes and code pertaining to many bus interfaces.<ref>{{cite web|url=http://www.atmel.com/dyn/resources/prod_documents/doc2541.pdf |archive-url=https://web.archive.org/web/20050516025202/http://www.atmel.com/dyn/resources/prod_documents/doc2541.pdf |archive-date=2005-05-16 |url-status=live|title=DES-encrypted AVR Bootloader|access-date=2012-09-19}}</ref><ref>{{cite web|url=http://www.atmel.com/dyn/resources/prod_documents/doc2589.pdf|title=AES-encrypted AVR Bootloader|access-date=2012-09-19}}</ref><ref>{{cite web|url=http://www.atmel.com/dyn/resources/prod_documents/doc2589.pdf|title=XMEGA Bootloader|access-date=2012-09-19}}</ref><ref>{{cite web|url=http://www.atmel.com/dyn/resources/prod_documents/doc7618.pdf |archive-url=https://web.archive.org/web/20060628210714/http://www.atmel.com/dyn/resources/prod_documents/doc7618.pdf |archive-date=2006-06-28 |url-status=live|title=AVR USB Bootloader|access-date=2012-09-19}}</ref>
=== ROM ===
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# The Atmel-ICE<ref>{{cite web|url=http://www.atmel.com/tools/atatmel-ice.aspx|title=Atmel-ICE - Atmel Corporation|publisher=Atmel.com|access-date=2015-09-11}}</ref> is the latest adapter. It supports JTAG, debugWire, aWire, SPI, TPI, and PDI interfaces.
# The JTAGICE 3<ref>{{cite web|url=http://www.atmel.com/dyn/products/tools_card.asp?tool_id=17213&category_id=163&family_id=607&subfamily_id=2138|title=JTAGICE 3- Atmel Corporation|publisher=Atmel.com|access-date=2012-09-19}}</ref> is a midrange debugger in the JTAGICE family (JTAGICE mkIII). It supports JTAG, aWire, SPI, and PDI interfaces.
# The JTAGICE mkII<ref>{{cite web|url=http://qaswww.atmel.com/tools/avrjtagicemkii.aspx|title=AVR JTAGICE mkII|work=Atmel|url-status=dead|archive-url=https://archive.today/20130215133712/http://qaswww.atmel.com/tools/avrjtagicemkii.aspx|archive-date=15 February 2013|access-date=13 January 2013}}</ref> replaces the JTAGICE and is similarly priced. The JTAGICE mkII interfaces to the PC via USB, and supports both JTAG and the newer debugWIRE interface. Numerous third-party clones of the Atmel JTAGICE mkII device started shipping after Atmel released the communication protocol.<ref>{{cite web|url=http://www.atmel.com/dyn/resources/prod_documents/doc2587.pdf |archive-url=https://web.archive.org/web/20050516182708/http://www.atmel.com/dyn/resources/prod_documents/doc2587.pdf |archive-date=2005-05-16 |url-status=live|title=JTAGICE mkII Communication Protocol|access-date=2012-09-19}}</ref>
# The AVR Dragon<ref>{{cite web|url=http://www.atmel.com/tools/avrdragon.aspx|title=AVR Dragon|work=Atmel|access-date=13 January 2013}}</ref> is a low-cost (approximately $50) substitute for the JTAGICE mkII for certain target parts. The AVR Dragon provides in-system serial programming, high-voltage serial programming and parallel programming, as well as JTAG or debugWIRE emulation for parts with 32 KB of program memory or less. ATMEL changed the debugging feature of AVR Dragon with the latest firmware of AVR Studio 4 - AVR Studio 5 and now it supports devices over 32 KB of program memory.
# The JTAGICE adapter interfaces to the PC via a standard serial port.<ref>{{Cite web|url=http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-42710-AVR-JTAGICE-mkII_UserGuide.pdf |archive-url=https://web.archive.org/web/20170702215107/http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-42710-AVR-JTAGICE-mkII_UserGuide.pdf |archive-date=2017-07-02 |url-status=live|title=AVR JTAGICE mkII User's Guide|website=microchip.com|access-date=25 March 2020}}</ref> Although the JTAGICE adapter has been declared "[[End-of-life (product)|end-of-life]]" by Atmel, it is still supported in AVR Studio and other tools.
JTAG can also be used to perform a [[boundary scan]] test,<ref>[http://atmel.com/dyn/corporate/view_detail.asp?ref=&FileName=JTEGICE.html&SEC_NAME=product JTAGICE Press Release, 2004.] {{webarchive|url=https://web.archive.org/web/20110707183223/http://atmel.com/dyn/corporate/view_detail.asp?ref=&FileName=JTEGICE.html&SEC_NAME=product|date=2011-07-07}}</ref> which tests the electrical connections between AVRs and other boundary scan capable chips in a system. Boundary scan is well-suited for a production line, while the hobbyist is probably better off testing with a multimeter or oscilloscope.
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=== AVR Dragon ===
[[File:AvrDragon.png|thumb|AVR Dragon with [[In-System Programming|ISP programming cable]] and attached, blue/greenish [[Zero insertion force|ZIF Socket]] ]]
The Atmel Dragon is an inexpensive tool which connects to a PC via USB. The Dragon can program all AVRs via JTAG, HVP, PDI,<ref>{{cite web|url=http://www.atmel.com/dyn/resources/prod_documents/doc8169.pdf |archive-url=https://web.archive.org/web/20091007220729/http://www.atmel.com/dyn/resources/prod_documents/doc8169.pdf |archive-date=2009-10-07 |url-status=live|title=AVR1005: Getting started with XMEGA, page 7|publisher=Atmel|access-date=7 November 2011}}</ref> or ICSP. The Dragon also allows debugging of all AVRs via JTAG, PDI, or debugWire; a previous limitation to devices with 32 KB or less program memory has been removed in AVR Studio 4.18.<ref>{{cite web|url=http://www.atmel.com/dyn/resources/prod_documents/releasenotes_avrstudio418.txt|title=AVR Studio v4.18 Release Notes|access-date=2012-09-19}}</ref> The Dragon has a small prototype area which can accommodate an 8, 28, or 40-pin AVR, including connections to power and programming pins. There is no area for any additional circuitry, although this can be provided by a third-party product called the "Dragon Rider".<ref>{{cite web|url=http://www.ecrostech.com/AtmelAvr/DragonRider/|title=ECROS Technology - Dragon Rider|date=2008-03-02|publisher=Ecrostech.com|access-date=2012-09-19}}</ref>
=== JTAGICE ===
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