AVR microcontrollers: Difference between revisions

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The '''Atmel AVR''' is a family of [[RISC]] [[microcontroller]]s from [[Atmel]]. The AVR architecture was conceived by two students at the [[Norwegian Institute of Technology]] (NTH) and further refined and developed at '''Atmel Norway''', the Atmel daughter company founded by the two chip architects.

The AVR is a [[Harvard Architecture|Harvard architecture]] CPU. It has 32 8-bit registers. Some instructions only operate on a subset of these registers. The concatenated Register File, Input-Output File and Data Memory accessmake isup viaa Load/StoreUnified instructionsMemory space accessed through Loads/Stores. Unlike the [[PIC microcontroller|PIC]], the Stack is located in RAMthis Unified Memory space and isn't strictly limited to a fixed size.

The AVR [[instruction set]] is more regular than that of many other 8-bit microcontrollers ([[PIC microcontroller|PIC]] for example), but [[AVR orthogonality|not strictly orthogonal]]. Compatibility across models is preserved.

The AVR was designed at the outset for efficient execution of [[compiler|compiled]] [[C programming language|C]] code. Thus some instructions, such as '<code>add immediate</code>', are strangely missing (you have to '<code>subtract immediate</code>' the [[complement]] instead), while others, such as '<code>compare with carry</code>', are included.

The AVR instruction set is physically implemented and sold on the market as a bunch of controllers, sharing the same AVR core but differing on peripheral / RAM / ROM capabilities: from the Tiny AVR controllers with 1KB flash ROM, no RAM, and 8 pins, up to Mega AVR controllers with 128KB flash ROM, 4KB RAM, 4KB EEPROM, 10 bit ADC with 8 channels, timers, comparators, JTAG, etc. Compatibility across models is preserved. <br>

The AVR is a [[Harvard Architecture|Harvard architecture]] CPU. It has 32 8-bit registers. Some instructions only operate on a subset of these registers. Memory access is via Load/Store instructions. Unlike the PIC, the Stack is located in RAM and isn't strictly limited to a fixed size.

Atmel's AVR controllers have a pipeline with 2 stages (fetch and execute) that allows them to execute most instructions in 1 clock, which makes them relatively fast among the 8-bit controllers on the market.

The AVR [[AVR instruction set]] is more regular than that of many other 8-bit microcontrollers ([[PIC microcontroller|PIC]] for example). However, butit [[AVRis orthogonality|not strictly orthogonal]].: Compatibilitypointer acrossregisters modelsX, isY, Z have different addressing capabilities, and the same with Register File and IO File locations, preserved.

Like the PIC, it has a dedicated [[hobbyist]] following (exemplified by the ''AVRFreaks'' Internet forum), largely due to the existence of inexpensive/free development tools, for instance a port of the GNU [[GNU Compiler Collection|GCC]] tools.