Cache (computing): Difference between revisions

Revision as of 01:07, 16 July 2024

Revision as of 01:10, 16 July 2024

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{{Short description|Additional storage that enables faster access to main storage}}

== {{Use dmy dates|date=August 2020}} ==

== Details ==

== {{Use dmy dates|date=August 2020}} ==

[[File:cache,basic.svg|thumb|upright=1|Diagram of a CPU memory cache operation]]

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During a cache miss, some other previously existing cache entry is typically removed in order to make room for the newly retrieved data. The [[Heuristic (computer science)|heuristic]] used to select the entry to replace is known as the [[Cache replacement policies|replacement policy]]. One popular replacement policy, least recently used (LRU), replaces the oldest entry, the entry that was accessed less recently than any other entry. More sophisticated caching algorithms also take into account the frequency of use of entries.

== Pronunciation ==

There are many ways "cache" can be used in a sentence, here are a few ways:

The CPU's L3 cache efficiently manages data sharing among multiple cores, optimizing overall processing performance.

The web server uses a distributed cache to store frequently accessed web pages, reducing server load and improving response times.

I cleared my browser's cache to fix the website loading issue—it worked like a charm!

The new software update promises faster load times by enhancing the efficiency of its disk cache system.

==={{Anchor|Dirty|WRITEPOLICIES|WRITE-BACK|WRITE-BEHIND|WRITE-THROUGH|WRITE-AROUND}}Writing policies===

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As GPUs advanced (especially with [[GPGPU|General Purpose GPU]] [[compute shader]]s) they have developed progressively larger and increasingly general caches, including [[instruction cache]]s for [[shader]]s, exhibiting increasingly common functionality with CPU caches. For example, [[GeForce 200 series|GT200]] architecture GPUs did not feature an L2 cache, while the GTX 490 GPU has 768 KB of last-level cache, the GTX TITAN GPU has 1536 KB of last-level cache, and the GTX 980 GPU has 2048 KB of last-level cache. These caches have grown to handle [[synchronisation primitive]]s between threads and [[atomic operation]]s, and interface with a CPU-style MMU.

In graphics processing units (GPUs), cache plays a critical role in improving computational efficiency by reducing the latency of memory accesses. GPUs have specialized caches that complement their massively parallel architecture, enhancing their ability to handle large volumes of data simultaneously.

Texture Cache: A type of GPU cache that stores texture data, including colors and textures used in rendering graphics. Texture caches help speed up the rendering process by reducing the need to access slower video memory.

L1 Cache: Similar to CPU caches, GPUs have L1 caches that are typically small but extremely fast. They store data and instructions that are actively being processed by GPU cores.

L2 Cache: GPUs also feature L2 caches, which are larger and slower than L1 caches but provide additional storage capacity for handling data and instructions across multiple cores.

NVIDIA Developer Documentation. Retrieved from <nowiki>https://developer.nvidia.com/gpu-programming-guide</nowiki>

AMD GPU Architecture Documentation. Retrieved from <nowiki>https://developer.amd.com/resources/documentation-articles/</nowiki>

===DSPs===

[[Digital signal processor]]s have similarly generalised over the years. Earlier designs used [[scratchpad memory]] fed by [[direct memory access]], but modern DSPs such as [[Qualcomm Hexagon]] often include a very similar set of caches to a CPU (e.g. [[Modified Harvard architecture]] with shared L2, split L1 I-cache and D-cache).<ref>{{cite web|title=qualcom Hexagon DSP SDK overview|url=https://developer.qualcomm.com/software/hexagon-dsp-sdk/dsp-processor}}</ref>

Digital Signal Processors (DSPs) often incorporate specialized cache architectures tailored to the unique requirements of signal processing tasks, which typically involve real-time data processing and manipulation.

Data Catches: DSPs commonly include data caches that store frequently accessed data, such as input samples, filter coefficients, and intermediate processing results. These caches help minimize memory access latency and improve overall processing efficiency.

Caches in DSPs play a crucial role in achieving high computational throughput and real-time responsiveness required in signal processing applications. They enable efficient data handling, reduce power consumption by minimizing external memory accesses, and support the execution of complex algorithms with minimal latency.

<ref>{{Cite web |title=Digital signal processors (DSPs) {{!}} TI.com |url=https://www.ti.com/microcontrollers-mcus-processors/digital-signal-processors/overview.html |access-date=2024-07-16 |website=www.ti.com |language=en-US}}</ref>

Analog Devices DSP Product Information. Retrieved from <nowiki>https://www.analog.com/en/applications/markets/dsp.html</nowiki>

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