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updating SSD and DRAM speeds to reflect modern hardware in 2024 |
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A different concept is the processor-memory performance gap, which can be addressed by [[Three-dimensional integrated circuit|3D integrated circuits]] that reduce the distance between the logic and memory aspects that are further apart in a 2D chip.<ref>{{cite book |page=790 |url=https://books.google.com/books?id=1PgYS7zDCM8C&q=processor-memory+performance+gap&pg=PA790 |access-date=March 31, 2014 |title=Nanoelectronics and Information Technology |author=Rainer Waser |publisher=John Wiley & Sons |year=2012 |url-status=live |archive-url=https://web.archive.org/web/20160801114150/https://books.google.com/books?id=1PgYS7zDCM8C&pg=PA790&dq=processor-memory+performance+gap&hl=en&sa=X&ei=jeM5U93YAqTr2QWc74A4&ved=0CDYQ6AEwAg#v=onepage&q=processor-memory%20performance%20gap&f=false |archive-date=August 1, 2016 |isbn = 9783527409273|author-link = Rainer Waser}}</ref> Memory subsystem design requires a focus on the gap, which is widening over time.<ref>{{cite book |url=https://books.google.com/books?id=0IY7LW5J4JgC&q=processor-memory+performance+gap&pg=PA109 |page=109 |access-date=March 31, 2014 |title=Advances in Computer Systems Architecture: 11th Asia-Pacific Conference, ACSAC 2006, Shanghai, China, September 6-8, 2006, Proceedings |author=Chris Jesshope and Colin Egan |publisher=Springer |date=2006 |url-status=live |archive-url=https://web.archive.org/web/20160801135254/https://books.google.com/books?id=0IY7LW5J4JgC&pg=PA109&dq=processor-memory+performance+gap&hl=en&sa=X&ei=jeM5U93YAqTr2QWc74A4&ved=0CEkQ6AEwBg#v=onepage&q=processor-memory%20performance%20gap&f=false |archive-date=August 1, 2016 |isbn=9783540400561 }}</ref> The main method of bridging the gap is the use of [[Cache (computing)|caches]]; small amounts of high-speed memory that houses recent operations and instructions nearby the processor, speeding up the execution of those operations or instructions in cases where they are called upon frequently. Multiple levels of caching have been developed to deal with the widening gap, and the performance of high-speed modern computers relies on evolving caching techniques.<ref>{{cite book |url=https://books.google.com/books?id=7i9Z69lrYBoC&q=processor-memory+performance+gap&pg=PA90 |pages=90–91 |access-date=March 31, 2014 |title=Multiprocessor Systems-on-chips |author=Ahmed Amine Jerraya and Wayne Wolf |publisher=Morgan Kaufmann |year=2005 |url-status=live |archive-url=https://web.archive.org/web/20160801105357/https://books.google.com/books?id=7i9Z69lrYBoC&pg=PA90&dq=processor-memory+performance+gap&hl=en&sa=X&ei=jeM5U93YAqTr2QWc74A4&ved=0CFMQ6AEwCA#v=onepage&q=processor-memory%20performance%20gap&f=false |archive-date=August 1, 2016 |isbn=9780123852519 }}</ref> There can be up to a 53% difference between the growth in speed of processor and the lagging speed of main memory access.<ref>{{cite book |url=https://books.google.com/books?id=f0pJYJQMlmoC&q=processor-memory+performance+gap&pg=PA529 |page=529 |access-date=March 31, 2014 |title=Experimental and Efficient Algorithms: Third International Workshop, WEA 2004, Angra Dos Reis, Brazil, May 25-28, 2004, Proceedings, Volume 3 |author=Celso C. Ribeiro and Simone L. Martins |publisher=Springer |year=2004 |url-status=live |archive-url=https://web.archive.org/web/20160801092734/https://books.google.com/books?id=f0pJYJQMlmoC&pg=PA529&dq=processor-memory+performance+gap&hl=en&sa=X&ei=1eM5U7veEaTx2QXM2oDYCw&ved=0CCwQ6AEwADgU#v=onepage&q=processor-memory%20performance%20gap&f=false |archive-date=August 1, 2016 |isbn=9783540220671 }}</ref>
[[Solid-state drive|Solid-state hard drives]] have continued to increase in speed, from ~400 Mbit/s via [[Serial ATA|SATA3]] in 2012 up to ~
==Timeline==
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