Opcode: Difference between revisions

Revision as of 18:40, 27 October 2024

Revision as of 18:47, 27 October 2024

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==CPUs==

Opcodes are found in the instructions of CPUs as well as in some [[virtual machine#Process virtual machines|abstract computing machines]]. In CPUs, an opcode may be referred to as '''instruction machine code'''<ref name="Intel_1973_MCS-4"/>, '''instruction code'''<ref name="Intel_1974_MCS-40"/>, '''instruction syllable'''<ref name="Jones_1988_CISC"/><ref name="Domagała_2012"/><ref name="Smotherman_2013"/><ref name="Jones_2016_CISC"/>, '''instruction parcel''' or '''opstring'''<ref name="Schulman_2005"/><ref name="Chiba_2007"/>. For any particular processor (which may be a general CPU or a more specialized processing unit), the opcodes are defined by the processor's [[instruction set architecture]] (ISA)<ref name="Hennessy_2017"/>, and can be described by means of an [[opcode table]]. The types of operations may include [[arithmetic]], data copying, [[logical operation]]s, and program control, as well as special instructions (e.g., [[CPUID]]).<ref name="Hennessy_2017"/>

In addition to the opcode, many instructions also specify the data (known as [[operand]]s) the operation will act upon, although some instructions may have implicit operands or none at all.<ref name="Hennessy_2017"/> The types of operations may include [[arithmetic]], data copying, [[logical operation]]s, and program control, as well as special instructions (e.g., [[CPUID]]).<ref name="Hennessy_2017"/> Some instruction sets have nearly uniform fields for opcode and operand specifiers, whereas others (e.g., [[x86]] architecture) have a less uniform, variable-length structure.<ref name="Hennessy_2017"/><ref name="Mansfield_1983"/> Instruction sets can be extended through the use of opcode prefixes which add a subset of new instructions made up of existing opcodes following reserved byte sequences.{{Citation needed|date=February 2023}}

=={{Anchor|SIS}}Software instruction sets==