Comparison of instruction set architectures: Difference between revisions

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Addressing modes: The address isn't necessarily virtual, e.g. on a system without any form of address translation.
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| Register–Memory
| CISC
| {{ubl|8 (+ 4 or 6 segment reg.) <small>(16/32-bit)</small>| 16 (+ 2 segment reg. gs/cs) <small>(64-bit)</small>| 32 with AVX-512 and Advance Performance eXtension (apx)}}<!-- general-purpose registers; floating-point stack and SSE registers not counted -->
| Variable<!-- 1 to 5 bytes --> <small>(8086 ~ 80386: variable between 1 and 6 bytes /w MMU + intel SDK, 80486: 2 to 5 bytes with prefix, pentium and onward: 2 to 4 bytes with prefix, x64: 4 bytes prefix, third party x86 emulation: 1 to 15 bytes w/o prefix & MMU . SSE/MMX: 4 bytes /w prefix AVX: 8 Bytes /w prefix)</small>
| Condition code