|
| align=right | 9
| align=right | 9
| [[#Fixed-point divide exception|Fixed-point divide]]<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>{{rp|pagep=80}}
|-
| align=right | A
| align=right | 10
| [[#Decimal overflow exception|Decimal overflow]]<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>{{rp|pagep=80}}
|-
| align=right | B
| align=right | 11
| [[#Decimal divide exception|Decimal divide]]<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>{{rp|pagep=80}}
|-
| align=right | C
| align=right | 12
| [[#Exponent overflow exception|Exponent overflow]]<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>{{rp|pagep=80}}
|-
| align=right | D
| align=right | 13
| [[#Exponent underflow exception|Exponent underflow]]<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>{{rp|pagep=80}}
|-
| align=right | E
| align=right | 14
| [[#Significance exception|Significance]]<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>{{rp|pagep=80}}
|-
| align=right | F
| align=right | 15
| [[#Floating-point divide exception|Floating-point divide]]<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>{{rp|pagep=80.1}}
|-
| align=right | 10
|}
* An '''operation exception'''<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>{{rp|pagep=79}} is recognized when a program attempts to execute an instruction with an opcode that the computer does not implement. In particular, an operation exception is recognized when a program is written for an optional feature, e.g., floating point, that is not installed.
* A '''privileged operation exception'''<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>{{rp|pagep=79}} is recognized when a program attempts to execute a privileged instruction when the problem state bit in the PSW is 1.
* An '''execute exception'''<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>{{rp|pagep=79}} is recognized when the operand of an [[Execute instruction|EXECUTE instruction (EX)]] is another EXECUTE instruction.
* A '''protection exception'''<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>{{rp|pagep=79}} is recognized when a program attempts to store into a ___location whose storage protect key does not match<ref group=NB>A PSW key of 0 matches any storage key.</ref> the PSW key, or to fetch from a fetch protected ___location whose storage protect key does not match the PSW key.
* An '''addressing exception'''<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>{{rp|pagespp=79–80}} is recognized when a program attempts to access a storage ___location that is not currently available. This normally occurs with an address beyond the capacity of the machine, but it may also occur on machines that allow blocks of storage to be taken offline.
*A '''specification exception'''<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>{{rp|pagep=80}} is recognized when an instruction has a length or register field with values not permitted by the operation, or when it has an operand address that does not satisfy the alignment requirements of the opcode, e.g., a LH instruction with an odd operand address on a machine without the byte alignment feature.
* A '''data exception'''<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>{{rp|pagep=80}} is recognized when a decimal instruction specifies invalid operands, e.g., invalid data, invalid overlap.
* A '''fixed-point overflow exception'''<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>{{rp|pagep=80}} is recognized when significant bits are lost in a fixed point arithmetic or shift instruction, other than divide.
* A '''fixed-point divide exception'''<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>{{rp|pagep=80}} is recognized when significant bits are lost in a fixed point divide or Convert to Binary instruction.
* A '''decimal overflow exception'''<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>{{rp|pagep=80}} is recognized when significant digits are lost in a decimal arithmetic instruction, other than divide.
* A '''decimal divide exception'''<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>{{rp|pagep=80}} is recognized when significant bits are lost in a decimal divide instruction. The destination is not altered.
* An '''exponent overflow exception'''<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>{{rp|pagep=80}} is recognized when the characteristic in a floating-point arithmetic operation exceeds 127 and the fraction is not zero.
* An '''exponent underflow exception'''<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>{{rp|pagep=80}} is recognized when the characteristic in a floating-point arithmetic operation is negative and the fraction is not zero.
* A '''significance exception'''<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>{{rp|pagep=80}} is recognized when the fraction in a floating-point add or subtract operation is zero.
* A '''floating-point divide exception'''<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>{{rp|pagep=80.1}} is recognized when the fraction in the divisor of a floating-point divide operation is zero.
===Supervisor Call interruption===
A Supervisor Call interruption<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>{{rp|pagespp=80.1–81}} occurs as the result of a [[Supervisor Call instruction]]; the system stores bits 8-15 of the SVC instruction as the Interruption Code.
===External interruption===
An External<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>{{rp|pagep=81}}<ref group=NB>Even though a timer expiration is an internal event, it causes an External interruption and for this reason, this interruption is usually referred to as a timer/external interruption.</ref> interruption occurs as the result of certain asynchronous events. Bits 16-24 of the External Old PSW are set to 0 and one or more of bits 24-31 is set to 1
{| class="wikitable collapsible"
===Machine Check interruption===
A Machine Check interruption<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>{{rp|pagespp=82–83}} occurs to report unusual conditions associated with the channel or CPU that cannot be reported by another class of interruption. The most important class of conditions causing a Machine Check is a hardware error such as a parity error found in registers or storage, but some models may use it to report less serious conditions. Both the interruption code and the data stored in the scanout area at '80'x (128 decimal) are model dependent.
==Input/Output==
===Channel status===
These conditions are detected by the channel and indicated in the [[#Channel Status Word|CSW]].<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>{{rp|pagespp=116–118}}
* {{Anchor|Program-controlled_interruption status|PCI status}}'''[[#CSW_Program-controlled_interruption status|Program-controlled interruption]]'''<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>{{rp|pagespp=116–117}} indicates that the channel has fetched a CCW with the PCI bit set. The channel continues processing; this interruption simply informs the CPU of the channel's progress. An example of the use of Program-controlled interruption is in the "Program Fetch" function of Contents Supervision, whereby the control program is notified that a Control/Relocation Record has been read. To ensure that this record has been completely read into main storage, a "disabled bit spin", one of the few which remains in the control program, is initiated. Satisfaction of the spin indicates that the Control/Relocation Record is completely in main storage and the immediately preceding Text Record may be relocated. After relocation, a NOP CCW is changed to a TIC and the channel program continues. In this way, an entire load module may be read and relocated while utilizing only one [[EXCP]], and possibly only one revolution of the disk drive. PCI also has applications in teleprocessing access method buffer management.
* {{Anchor|Incorrect length|IL}}'''[[#CSW_Incorrect_length|Incorrect length]]'''<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>{{rp|pagep=117}} indicates that the data transfer for a command completed before the Count was exhausted. This indication is suppressed if the [[#CCW-SuppressLengthIndication|Suppress-Length-Indication]] bit in the CCW is set.
* '''[[#CSW_Program_check|Program check]]'''<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>{{rp|pagep=117}} indicates one of the following errors
** Nonzero bits where zeros are required
** An invalid data or CCW address
** The CAW or a TIC refers to a TIC
* {{Anchor|Protection check}}'''[[#CSW_Protection_check|Protection check]]'''<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>{{rp|pagespp=117–118}} indicates that the protection key in the CAW is non-zero and does not match the storage protection key.
* {{Anchor|Channel data check|CDC}}'''[[#CSW_Channel_data_check|Channel data check]]'''<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>{{rp|pagep=118}} indicates a parity error during a data transfer.
* {{Anchor|Channel control check|CCC}}'''[[#CSW_Channel_control_check|Channel control check]]'''<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>{{rp|pagep=118}} indicates a channel malfunction other than [[#Channel data check|Channel data check]] or [[#Interface control check|Interface control check]].
* {{Anchor|Interface control check|ICC}}'''[[#CSW_Interface_control_check|Interface control check]]'''<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>{{rp|pagep=118}} indicates an invalid signal in the channel to control unit interface.
* {{Anchor|Chaining check}}'''[[#CSW_Chaining_check|Chaining check]]'''<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>{{rp|pagep=118}} indicates lost data during data chaining.
===Unit status===
These conditions are presented to the channel by the control unit or device.<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>{{rp|pagespp=113–116}} In some cases they are handled by the channel and in other cases they are indicated in the [[#Channel Status Word|CSW]]. There is no distinction between conditions detected by the control unit and conditions detected by the device.
* {{Anchor|Attention}}'''[[#CSW_Attention|Attention]]'''<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>{{rp|pagep=113}} indicates an unusual condition not associated with an ongoing channel program. It often indicates some sort of operator action like requesting input, in which case the CPU would respond by issuing a read-type command, most often a sense command (04h) from which additional information could be deduced. Attention is a special condition, and requires specific operating system support, and for which the operating system has a special attention table<ref group=NB>The OS uses the attention index in a [[Unit Control Block]] (UCB) as an index into the attention table.</ref> with a necessarily limited number of entries.
* {{Anchor|Status modifier|SM}}'''[[#CSW_Status_modifier|Status modifier]]'''<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>{{rp|pagespp=113–114}} (SM) indicates one of three unusual conditions
** A Test I/O instruction was issued to a device that does not support it.
** A [[#Busy|Busy]] status refers to the control unit rather than to the device.
:: where the TIC causes the channel to refetch the search until the device indicates a successful search by raising SM.
* {{Anchor|Control unit end}}'''[[#CSW_Control_unit_end|Control unit end]]'''<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>{{rp|pagep=114}} indicates that a previous control unit busy status has been cleared.
* {{Anchor|Busy}}'''[[#CSW_Busy|Busy]]'''<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>{{rp|pagespp=114–115}} indicates that a device ([[#Status modifier|SM]]=0) or a control unit ([[#Status modifier|SM]]=1) is busy.
* {{Anchor|Channel end|CE}}'''[[#CSW_Channel_end|Channel end]]'''<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>{{rp|pagep=115}} indicates that the device has completed the data transfer for a channel command. There may also be an [[#Incorrect length|Incorrect length]] indication if the Count field of the CCW is exhausted, depending on the value of the [[#CCW-SuppressLengthIndication|Suppress-Length-Indication]] bit.
* {{Anchor|Device end|DE}}'''[[#CSW_Device_end|Device end]]'''<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>{{rp|pagep=115}} indicates that the device has completed an operation and is ready to accept another. DE may be signalled concurrently with [[#Channel en|CE]] or may be delayed.
* {{Anchor|Unit check|UC}}'''[[#CSW_Unit_check|Unit check]]'''<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>{{rp|pagesp=115–116}} indicates that the device or control unit has detected an unusual conditions and that details may be obtained by issuing a Sense command.
* {{Anchor|Unit exception|UE}}'''[[#CSW_Unit_exception|Unit exception]]'''<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>{{rp|pagep=116}} indicates that the device has detected an unusual condition, e.g., end of file.
===Channel Address Word===
===Channel Command Word===
A ''Channel Command Word'' is a doubleword containing the following:
* an 8-bit channel [[#CCW Command codes|Command Code]]<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>{{rp|pagep=100}}
* a 24-bit address<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>{{rp|pagespp=100–101}}
* a 5-bit flag field<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>{{rp|pagespp=99–100,101–105}}
* an unsigned halfword Count field<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>{{rp|pagespp=100–101}}
====CCW Command codes====
|-
| style="font-family:monospace" | MMMM 0100
| Sense<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>{{rp|pagespp=106–107}}
|-
| style="font-family:monospace" | **** 1000
|}
* The '''Protection Key''' field contains the protect key from the CAW at the time that the I/O operation was initiated for I/O complete or PCI interruptions.<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>{{rp|pagep=119}}
* The '''Command Address''' field contains the address+8 of the last CCW fetched for an I/O complete or PCI interruption. However, there are 9 exceptions<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>.{{rp|pagep=119}}
* The '''Status''' field contains one byte of [[#Channel status|Channel status]] bits, indicating conditions detected by the channel<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>,{{rp|pagespp=116–118}} and one byte of [[#Unit status|Unit status]] bits, indicating conditions detected by the I/O unit<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>.{{rp|pagespp=113–116}} There is no distinction between conditions detected by the control unit and conditions detected by the device.
* The '''Residual Count''' is a half word that gives the number of bytes in the area described by the CCW that have not been transferred to or from the channel<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>.{{rp|pagep=120}} The difference between the count in the CCW and the residual count gives the number of bytes transferred.
===I/O instructions===
===Direct Control===
The ''Direct Control''<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>{{rp|pagep=17.1}} feature provides six external signal lines and an 8-bit data path to/from storage.<ref name=A22-6845/>
===Floating-point arithmetic===
===Multi-system operation===
''Multi-system operation''<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>{{rp|pagespp=17.1–18}} is a set of features to support multi-processor systems, e.g., [[#Direct Control|Direct Control]], direct address relocation (prefixing).
===Storage protection===
| 