Floating point operations per second: Difference between revisions

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|[[SSE4|SSE4/4a]] (128-bit) || 4 || 8 || 0
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| AMD [[Bulldozer (microarchitecture)|Bulldozer]]<ref name="tpeak_jos" /> <br/>([[Piledriver (microarchitecture)|Piledriver]], [[Steamroller (microarchitecture)|Steamroller]], [[Excavator (microarchitecture)|Excavator]])
|{{plainlistublist|
*|[[Advanced Vector Extensions|AVX]] (128-bit) <br/>(Bulldozer, Steamroller)
*|[[AVX2]] (128-bit) (Excavator)
*|[[FMA instruction set|FMA3]] (Bulldozer)<ref>{{Cite web|url=https://developer.amd.com/wordpress/media/2012/10/New-Bulldozer-and-Piledriver-Instructions.pdf|title=New instructions support for Bulldozer (FMA3) and Piledriver (FMA3+4 and CVT, BMI, TB
M)}}</ref>
*|[[FMA instruction set|FMA3/4]] (Piledriver, Excavator)
}}
| 4 || 8 || 0
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|[[ENIAC]] @ 100&nbsp;kHz in 1945
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|0.004<ref>ENIAC @ 100&nbsp;kHz with 385 Flops {{Cite web|title=Computers of Yore|url=https://www.clear.rice.edu/comp201/08-spring/lectures/lec02/computers.shtml|access-date=2021-02-26|website=clear.rice.edu}}</ref><br/>(~0.00000003 {{val|3|e=-8|u=FLOPS/[[Watt|upl=W]]}})
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|[[Parallella]] E16 @ 1000 MHz in 2012
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|2<ref name="Epiphany multi-core coprocessor E16G301 specs">[http://www.adapteva.com/products/silicon-devices/e16g301/ Epiphany-III 16-core 65nm Microprocessor (E16G301)] // [http://www.adapteva.com/author/admin/ admin] (August 19, 2012)</ref> <br/>(5.0&nbsp;GFLOPS/W)<ref name="FeldmanM_(2014)"/>
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|[[Parallella]] E64 @ 800 MHz in 2012
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|2<ref name="Epiphany multi-core coprocessor E64G401 specs">[http://www.adapteva.com/products/silicon-devices/e64g401/ Epiphany-IV 64-core 28nm Microprocessor (E64G401)] // [http://www.adapteva.com/author/admin/ admin] (August 19, 2012)</ref> <br/>(50.0&nbsp;GFLOPS/W)<ref name="FeldmanM_(2014)">{{cite web|url=http://www.hpcwire.com/2012/08/22/adapteva_unveils_64-core_chip/|title=Adapteva Unveils 64-Core Chip|last= Feldman|first=Michael|date=August 22, 2012|publisher=HPCWire|accessdate=September 3, 2014}}</ref>
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