Content deleted Content added
Merged content from Hazard (computer architecture) to here. |
Previous version implied that fixing the WAR dependency was introducing a new RAW dependency. That is untrue. There was already a RAW dependency in the setup of the example. |
||
Line 99:
3. B = 7
A new variable, B2, has been declared as a copy of B in a new instruction, instruction N. The anti-dependency between 2 and 3 has been removed, meaning that these instructions may now be executed in parallel.
Note === Output dependency (write-after-write) ===
|