Data dependency: Difference between revisions

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Merged content from Hazard (computer architecture) to here.
Rraimii (talk | contribs)
Previous version implied that fixing the WAR dependency was introducing a new RAW dependency. That is untrue. There was already a RAW dependency in the setup of the example.
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3. B = 7
 
A new variable, B2, has been declared as a copy of B in a new instruction, instruction N. The anti-dependency between 2 and 3 has been removed, meaning that these instructions may now be executed in parallel. However,

Note thethat modificationthere hasis introducedstill a newread-after-write dependency: instruction 2 is now truly dependent on instruction N, which is truly dependent upon instruction 1. AsThis flowdependency existed in the original dependenciesversion, thesewhere newinstruction dependencies2 arewas impossibletruly todependent safelyon removeinstruction 1.<ref name="architecture"/>
 
=== Output dependency (write-after-write) ===