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* Latency and bandwidth are two metrics associated with caches. Neither of them is uniform, but is specific to a particular component of the memory hierarchy.<ref name=sun>{{Cite journal | first = Ruud | last = van der Pas | title = Memory Hierarchy in Cache-Based Systems | url = http://www.sun.com/blueprints/1102/817-0742.pdf | year = 2002 | page = 26 | place = Santa Clara, California | publisher = [[Sun Microsystems]] | id = 817-0742-10}}</ref>
* Predicting where in the memory hierarchy the data resides is difficult.<ref name=sun />
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==Examples==
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