IBM System/360 architecture: Difference between revisions

Revision as of 13:52, 14 March 2025

Revision as of 23:51, 19 March 2025

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The architecture<ref name=A22-6821-7/>{{rp|pages=77–83}} defines 5 classes of [[interrupt]]ion. An interruption is a mechanism for automatically changing the program state; it is used for both synchronous{{efn|The S/360 literature does not use the terms fault or [[Trap (computing)|trap]]}} and [[asynchrony (computing)|asynchronous]] events.

{| class="wikitable" collapsiblestyle="text-align: right;"

|-

! rowspan="2" | Interruption class !! colspan="2" | Old PSW<br />hex dec !! Newcolspan="2" PSW<br| />hexNew decPSW

! alignrowspan=right valign=top"2" | Priority

|-

! hex !! dec !! hex !! dec

| [[#Input/Output interruption|Input/Output]]{{sfn|PoOps|pp=78-79}} || 38&nbsp;&nbsp;&nbsp;56 || 78&nbsp;&nbsp;120 || align=right | 4

|-

| [[#ProgramInput/Output interruption|ProgramInput/Output]]{{sfn|PoOps|pp=79–80.178-79}} || 28&nbsp;&nbsp;&nbsp;4038 || 68&nbsp;10456 || align=right78 || 120 || 24

|-

| [[#Supervisor CallProgram interruption|Supervisor CallProgram]]{{sfn|PoOps|pp=8079–80.1–811}} || 20&nbsp;&nbsp;&nbsp;3228 || 60&nbsp;&nbsp;&nbsp;9640 || align=right68 || 104 || 2

|-

| [[#ExternalSupervisor Call interruption|ExternalSupervisor Call]]{{sfn|PoOps|pp=81–8280.1–81}} || 18&nbsp;&nbsp;&nbsp;2420 || 58&nbsp;&nbsp;&nbsp;8832 || align=right60 || 96 || 32

|-

| [[#Machine CheckExternal interruption|Machine CheckExternal]]{{sfn|PoOps|pp=82–8381–82}} || 30&nbsp;&nbsp;&nbsp;4818 || 70&nbsp;&nbsp;11224 || align=right58 || 88 || 13

|-

| [[#Machine Check interruption|Machine Check]]{{sfn|PoOps|pp=82–83}} || 30 || 48 || 70 || 112 || 1

|}