Random-access memory: Difference between revisions

Revision as of 14:16, 7 April 2025

Revision as of 20:11, 8 May 2025

Line 52:

In 1966, [[Robert Dennard]], while examining the characteristics of MOS technology, found it was capable of building [[capacitor]]s, and that storing a charge or no charge on the MOS capacitor could represent the 1 and 0 of a bit, and the MOS transistor could control writing the charge to the capacitor. This led to his development of modern DRAM architecture for which there is a single MOS transistor per capacitor.<ref name="ibm100"/> In 1967, Dennard filed a patent under IBM for a single-transistor DRAM memory cell, based on MOS technology.<ref name="ibm100" /><ref name="Robert Dennard"/> The first commercial DRAM IC chip was the [[Intel 1103]], which was [[Semiconductor manufacturing process|manufactured]] on an [[10 μm process|8{{nbsp}}μm]] MOS process with a capacity of 1{{nbsp}}[[Kilobit|kbit]], and was released in 1970.<ref name="computerhistory1970"/><ref name="Lojek-1103"/><ref>{{cite web |first=Mary |last=Bellis |url=http://inventors.about.com/library/weekly/aa100898.htm |title=Who Invented the Intel 1103 DRAM Chip? |access-date=2025-03-03}}</ref>

The earliest DRAMs were often synchronized with the CPU clock and were used with early microprocessors. In the mid-1970s, DRAMs moved to the asynchronous design, but in the 1990s returned to synchronous operation.<ref>{{cite book |author=P. Darche |url=https://books.google.com/books?id=rLC9zQEACAAJ |title=Microprocessor: Prolegomenes - Calculation and Storage Functions - Calculation Models and Computer |year=2020 |isbn=9781786305633 |page=59| publisher=John Wiley & Sons }}</ref><ref>{{cite book |author1=B. Jacob |url=https://books.google.com/books?id=SrP3aWed-esC |title=Memory Systems: Cache, DRAM, Disk |author2=S. W. Ng |author3=D. T. Wang |publisher=Morgan Kaufmann |year=2008 |isbn=9780080553849 |page=324}}</ref> In 1992 Samsung released KM48SL2000, which had a capacity of 16{{nbsp}}[[Mbit]].<ref name="electronic-design">{{cite journal |title=Electronic Design |journal=[[Electronic Design]] |date=1993 |volume=41 |issue=15–21 |url=https://books.google.com/books?id=QmpJAQAAIAAJ |publisher=Hayden Publishing Company |quote=The first commercial synchronous DRAM, the Samsung 16-Mbit KM48SL2000, employs a single-bank architecture that lets system designers easily transition from asynchronous to synchronous systems.}}</ref><ref>{{cite web |title=KM48SL2000-7 Datasheet |url=https://www.datasheetarchive.com/KM48SL2000-7-datasheet.html |publisher=[[Samsung]] |access-date=19 June 2019 |date=August 1992}}</ref> The first commercial [[double data rate]] SDRAM was Samsung's 64{{nbsp}}Mbit [[DDR SDRAM]], released in June 1998.<ref>{{cite news |title=Samsung Electronics Develops First 128Mb SDRAM with DDR/SDR Manufacturing Option |url=https://www.samsung.com/semiconductor/insights/news-events/samsung-electronics-develops-first-128mb-sdram-with-ddr-sdr-manufacturing-option/ |access-date=23 June 2019 |work=[[Samsung Electronics]] |publisher=[[Samsung]] |date=10 February 1999}}</ref> [[GDDR]] (graphics DDR) is a form of [[SGRAM]] (synchronous graphics RAM), which was first released by Samsung as a 16{{nbsp}}Mbit memory chip in 1998.<ref>{{cite news |title=Samsung Electronics Comes Out with Super-Fast 16M DDR SGRAMs |url=https://www.samsung.com/semiconductor/insights/news-events/samsung-electronics-comes-out-with-super-fast-16m-ddr-sgrams/ |access-date=23 June 2019 |work=[[Samsung Electronics]] |publisher=[[Samsung]] |date=17 September 1998}}</ref><!--[[User:Kvng/RTH]]-->

==Types==

The two widely used forms of modern RAM are [[static RAM]] (SRAM) and [[dynamic RAM]] (DRAM). In SRAM, a [[Bit|bit of data]] is stored using the state of a six-[[transistor]] [[Memory cell (computing)|memory cell]], typically using six MOSFETs. This form of RAM is more expensive to produce, but is generally faster and requires less dynamicstatic power than DRAM. In modern computers, SRAM is often used as [[CPU cache|cache memory for the CPU]]. DRAM stores a bit of data using a transistor and [[capacitor]] pair (typically a MOSFET and [[MOS capacitor]], respectively),<ref>{{cite book |last1=Sze |first1=Simon M. |author1-link=Simon Sze |title=Semiconductor Devices: Physics and Technology |date=2002 |publisher=[[Wiley (publisher)|Wiley]] |isbn=0-471-33372-7 |page=214 |edition=2nd |url=http://www.fulviofrisone.com/attachments/article/453/Semiconductor.Devices_Physics.Technology_Sze.2ndEd_Wiley_2002.pdf}}</ref> which together comprise a DRAM cell. The capacitor holds a high or low charge (1 or 0, respectively), and the transistor acts as a switch that lets the control circuitry on the chip read the capacitor's state of charge or change it. As this form of memory is less expensive to produce than static RAM, it is the predominant form of computer memory used in modern computers.<!--[[User:Kvng/RTH]]-->

Both static and dynamic RAM are considered ''volatile'', as their state is lost or reset when power is removed from the system. By contrast, [[read-only memory]] (ROM) stores data by permanently enabling or disabling selected transistors, such that the memory cannot be altered. Writable variants of ROM (such as [[EEPROM]] and [[NOR flash]]) share properties of both ROM and RAM, enabling data to [[Persistence (computer science)|persist]] without power and to be updated without requiring special equipment. [[ECC memory]] (which can be either SRAM or DRAM) includes special circuitry to detect and/or correct random faults (memory errors) in the stored data, using [[parity bit]]s or [[Error detection and correction#Error-correcting code|error correction codes]].