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** Optional boot code section with independent lock bits for protection
* On-chip debugging (OCD) support through JTAG or [[debugWIRE]] on most devices
** The JTAG signals (TMS, TDI, TDO, and TCK) are multiplexed on [[General Purpose Input/Output|GPIOs]]. These pins can be configured to function as JTAG or GPIO depending on the setting of a [[fuse bit]], which can be programmed via [[in-system programming]] (ISP) or HVSP. By default, AVRs with JTAG come with the JTAG interface enabled.
** [[debugWIRE]] uses the /RESET pin as a bi-directional communication channel to access on-chip debug circuitry. It is present on devices with lower pin counts, as it only requires one pin.
* Internal data [[EEPROM]] up to 4 KB
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