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While manufacturing technology improves, reducing the size of individual gates, physical limits of [[semiconductor]]-based [[microelectronics]] have become a major design concern. These physical limitations can cause significant heat dissipation and data synchronization problems. Various other methods are used to improve CPU performance. Some ''[[instruction-level parallelism]]'' (ILP) methods such as [[superscalar]] [[instruction pipelining|pipelining]] are suitable for many applications, but are inefficient for others that contain difficult-to-predict code. Many applications are better suited to ''[[thread-level parallelism]]'' (TLP) methods, and multiple independent CPUs are commonly used to increase a system's overall TLP. A combination of increased available space (due to refined manufacturing processes) and the demand for increased TLP led to the development of multi-core CPUs.
===Early
In the 1990s, [[Kunle Olukotun]] led the Stanford Hydra Chip Multiprocessor (CMP) research project. This initiative was among the first to demonstrate the viability of integrating multiple processors on a single chip, a concept that laid the groundwork for today's multicore processors. The Hydra project introduced support for thread-level speculation (TLS), enabling more efficient parallel execution of programs.
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