Instruction set architecture: Difference between revisions

Revision as of 13:19, 19 May 2025

Revision as of 13:29, 19 May 2025

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{{Machine code}}

In [[computer science]], an ''' instruction set architecture''' ('''ISA''') is an [[Conceptual model|abstract model]] that generally defines how [[software]] controls the [[Central processing unit|CPU]] in a computer or a family of computers.<ref>{{Cite web |title=GLOSSARY: Instruction Set Architecture (ISA) |url=https://www.arm.com/glossary/isa |archive-url=https://web.archive.org/web/20231111175250/https://www.arm.com/glossary/isa |archive-date=2023-11-11 |access-date=2024-02-03 |website=arm.com}}</ref> A device or program that executes instructions described by that ISA, such as a central processing unit (CPU), is called an ''[[implementation]]'' of that ISA.

In general, an ISA defines the supported [[Machine code|instructions]], [[data type]]s, [[Register (computer)|registers]], the hardware support for managing [[Computer memory|main memory]],{{Clarify|date=April 2024|reason=See "What does "Hardware support for managing main memory" refer to?" on the talk page.]]}} fundamental features (such as the [[memory consistency]], [[addressing mode]]s, [[virtual memory]]), and the [[input/output]] model of implementations of the ISA.