Neuromorphic computing: Difference between revisions

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In June 2012, [[spintronic]] researchers at [[Purdue University]] presented a paper on the design of a neuromorphic chip using [[Spin valve|lateral spin valve]]s and [[memristor]]s. They argue that the architecture works similarly to neurons and can therefore be used to test methods of reproducing the brain's processing. In addition, these chips are significantly more energy-efficient than conventional ones.<ref name="Spin Devices Prop">{{Cite arXiv|title=Proposal For Neuromorphic Hardware Using Spin Devices|eprint=1206.3227|last1=Sharad|first1=Mrigank|last2=Augustine|first2=Charles|last3=Panagopoulos|first3=Georgios|last4=Roy|first4=Kaushik|class=cond-mat.dis-nn|year=2012}}</ref>

Research at [[HP Labs]] on Mott memristors has shown that while they can be non-[[Volatile memory|volatile]], the volatile behavior exhibited at temperatures significantly below the [[phase transition]] temperature can be exploited to fabricate a [[neuristor]],<ref name=":0" /> a biologically- inspired device that mimics behavior found in neurons.<ref name=":0">{{Cite journal | doi = 10.1038/nmat3510| pmid = 23241533| title = A scalable neuristor built with Mott memristors| journal = Nature Materials| volume = 12| issue = 2| pages = 114–7| year = 2012| last1 = Pickett | first1 = M. D. | last2 = Medeiros-Ribeiro | first2 = G. | last3 = Williams | first3 = R. S. | bibcode = 2013NatMa..12..114P| s2cid = 16271627}}</ref> In September 2013, they presented models and simulations that show how the spiking behavior of these neuristors can be used to form the components required for a [[Turing machine]].<ref>{{cite journal|doi=10.1088/0957-4484/24/38/384002|title=Phase transitions enable computational universality in neuristor-based cellular automata|author1=Matthew D Pickett|author2=R Stanley Williams|name-list-style=amp|date=September 2013|publisher=IOP Publishing Ltd|journal=Nanotechnology|volume=24|issue=38|pmid=23999059|bibcode=2013Nanot..24L4002P|s2cid=9910142 |at=384002}}</ref>

[[Neurogrid]], built by ''Brains in Silicon'' at [[Stanford University]],<ref>{{cite journal|last1=Boahen|first1=Kwabena|title=Neurogrid: A Mixed-Analog-Digital Multichip System for Large-Scale Neural Simulations|journal=Proceedings of the IEEE|date=24 April 2014|volume=102|issue=5|pages=699–716|doi=10.1109/JPROC.2014.2313565|s2cid=17176371}}</ref> is an example of hardware designed using neuromorphic engineering principles. The circuit board is composed of 16 custom-designed chips, referred to as NeuroCores. Each NeuroCore's analog circuitry is designed to emulate neural elements for 65536 neurons, maximizing energy efficiency. The emulated neurons are connected using digital circuitry designed to maximize spiking throughput.<ref>{{cite journal|doi=10.1038/503022a|pmid = 24201264|title = Neuroelectronics: Smart connections|journal = Nature|volume = 503|issue = 7474|pages = 22–4|year = 2013|last1 = Waldrop|first1 = M. Mitchell|bibcode = 2013Natur.503...22W|doi-access = free}}</ref><ref>{{cite journal|doi=10.1109/JPROC.2014.2313565|title = Neurogrid: A Mixed-Analog-Digital Multichip System for Large-Scale Neural Simulations|journal = Proceedings of the IEEE|volume = 102|issue = 5|pages = 699–716|year = 2014|last1 = Benjamin|first1 = Ben Varkey|last2 = Peiran Gao|last3 = McQuinn|first3 = Emmett|last4 = Choudhary|first4 = Swadesh|last5 = Chandrasekaran|first5 = Anand R.|last6 = Bussat|first6 = Jean-Marie|last7 = Alvarez-Icaza|first7 = Rodrigo|last8 = Arthur|first8 = John V.|last9 = Merolla|first9 = Paul A.|last10 = Boahen|first10 = Kwabena|s2cid = 17176371}}</ref>