Random-access memory: Difference between revisions

Revision as of 21:59, 11 June 2025

Revision as of 19:29, 20 July 2025

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[[File:Early SSA accounting operations.jpg|thumb|These IBM [[tabulating machine]]s from the mid-1930s used [[mechanical counter]]s to store information.]]

Early computers used [[relay]]s, [[mechanical counter]]s<ref>{{cite web|url=http://www-03.ibm.com/ibm/history/reference/faq_0000000011.html|title=IBM Archives -- FAQ's for Products and Services|work=ibm.com|url-status=dead|archive-url=https://web.archive.org/web/20121023184527/http://www-03.ibm.com/ibm/history/reference/faq_0000000011.html|archive-date=2012-10-23}}</ref> or [[Delay-line memory|delay lines]] for main memory functions. Ultrasonic delay lines were [[bit-serial architecture|serial devices]] which could only reproduce data in the order it was written. [[Drum memory]] could be expanded at relatively low cost but efficient retrieval of memory items requires knowledge of the physical layout of the drum to optimize speed. Latches built out of [[triode vacuum tube]]s, and later, out of [[discrete transistor]]s, were used for smaller and faster memories such as [[Hardware register|registers]]. Such registers were relatively large and too costly to use for large amounts of data; generally, only a few dozen or few hundred bits[[bit]]s of such memory could be provided.

The first practical form of random-access memory was the [[Williams tube]]. It stored data as electrically charged spots on the face of a [[cathode-ray tube]]. Since the electron beam of the CRT could read and write the spots on the tube in any order, memory was random access. The capacity of the Williams tube was a few hundred to around a thousand bits, but it was much smaller, faster, and more power-efficient than using individual vacuum tube latches. Developed at the [[Victoria University of Manchester|University of Manchester]] in England, the Williams tube provided the medium on which the first electronically stored program was implemented in the [[Manchester Baby]] computer, which first successfully ran a program on 21 June, 1948.<ref>{{Citation | last = Napper | first = Brian | title = Computer 50: The University of Manchester Celebrates the Birth of the Modern Computer | url = http://www.computer50.org/ | access-date = 26 May 2012 | url-status = dead | archive-url = https://web.archive.org/web/20120504133240/http://www.computer50.org/ | archive-date = 4 May 2012 }}</ref> In fact, rather than the Williams tube memory being designed for the Baby, the Baby was a [[testbed]] to demonstrate the reliability of the memory.<ref>{{Citation |last1=Williams |first1=F. C. |last2=Kilburn |first2=T. |title=Electronic Digital Computers |journal=Nature |volume=162 |pages=487 |date=Sep 1948 |doi=10.1038/162487a0 |issue=4117 |postscript=. |bibcode=1948Natur.162..487W |s2cid=4110351|doi-access=free }} Reprinted in ''The Origins of Digital Computers''.</ref><ref>{{Citation |last1=Williams |first1=F. C. |last2=Kilburn |first2=T. |last3=Tootill |first3=G. C. |title=Universal High-Speed Digital Computers: A Small-Scale Experimental Machine |url=http://www.computer50.org/kgill/mark1/ssem.html |journal=Proc. IEE |date=Feb 1951 |volume=98 |issue=61 |pages=13–28 |postscript=. |doi=10.1049/pi-2.1951.0004 |url-status=dead |archive-url=https://web.archive.org/web/20131117101730/http://www.computer50.org/kgill/mark1/ssem.html |archive-date=2013-11-17|url-access=subscription }}</ref>

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| inventor = Robert H. Norman

| invent1 = Fairchild Camera and Instrument Corporation

}}</ref> It was followed by the development of MOS SRAM by John Schmidt at Fairchild in 1964.<ref name="computerhistory1970"/> SRAM became an alternative to magnetic-core memory, but required six MOS transistors for each [[bit]] of data.<ref name="ibm100">{{cite web |title=DRAM |url=https://www.ibm.com/ibm/history/ibm100/us/en/icons/dram/ |website=IBM100 |publisher=[[IBM]] |access-date=20 September 2019 |date=9 August 2017}}</ref> Commercial use of SRAM began in 1965, when [[IBM]] introduced the SP95 memory chip for the [[IBM System/360|System/360 Model 95]].<ref name="computerhistory1966"/>

[[Dynamic random-access memory]] (DRAM) allowed replacement of a 4 or 6-transistor latch circuit by a single transistor for each memory bit, greatly increasing memory density at the cost of volatility. Data was stored in the tiny capacitance of each transistor and had to be periodically [[Memory refresh|refreshed]] every few milliseconds before the charge could leak away.

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==Types==

In general, the term ''RAM'' refers solely to solid-state memory devices, and more specifically the main memory in most computers. The two widely used forms of modern RAM are [[static RAM]] (SRAM) and [[dynamic RAM]] (DRAM). In SRAM, a [[Bit|bit of data]] is stored using the state of a [[Memory cell (computing)|memory cell]], typically using six MOSFETs. This form of RAM is more expensive to produce, but is generally faster and requires less static power than DRAM. In modern computers, SRAM is often used as [[CPU cache|cache memory for the CPU]]. DRAM stores a bit of data using a transistor and [[capacitor]] pair (typically a MOSFET and [[MOS capacitor]], respectively),<ref>{{cite book |last1=Sze |first1=Simon M. |author1-link=Simon Sze |title=Semiconductor Devices: Physics and Technology |date=2002 |publisher=[[Wiley (publisher)|Wiley]] |isbn=0-471-33372-7 |page=214 |edition=2nd |url=http://www.fulviofrisone.com/attachments/article/453/Semiconductor.Devices_Physics.Technology_Sze.2ndEd_Wiley_2002.pdf}}</ref> which together comprise a DRAM cell. The capacitor holds a high or low charge (1 or 0, respectively), and the transistor acts as a switch that lets the control circuitry on the chip read the capacitor's state of charge or change it. As this form of memory is less expensive to produce than static RAM, it is the predominant form of computer memory used in modern computers.

Both static and dynamic RAM are considered ''volatile'', as their state is lost when power is removed from the system. By contrast, [[read-only memory]] (ROM) stores data by permanently enabling or disabling selected transistors, such that the memory cannot be altered. Writable variants of ROM (such as [[EEPROM]] and [[NOR flash]]) share properties of both ROM and RAM, enabling data to [[Persistence (computer science)|persist]] without power and to be updated without requiring special equipment.

[[ECC memory]] (which can be either SRAM or DRAM) includes special circuitry to detect and/or correct random faults (memory errors) in the stored data, using [[parity bit]]s or [[Error detection and correction#Error-correcting code|error correction codes]].<!--[[User:Kvng/RTH]]-->

==Memory cell==

{{main|Memory cell (computing)}}

The memory cell is the fundamental building block of [[computer memory]]. The memory cell is an [[electronic circuit]] that stores one [[bit]] of binary information. andThe itcell mustcan be set to store a logic 1 (high voltage level) and reset to store a logic 0 (low voltage level). Its value is maintained/stored until it is changed by the set/reset process. The value in the memory cell can be accessed by reading it.

In SRAM, the memory cell is a type of [[flip-flop (electronics)|flip-flop]] circuit, usually implemented using [[FET]]s. This means that SRAM requires very low power when not being accessed, but it is complex, expensive and has low storage density.

A second type, DRAM, is based around a capacitor. Charging and discharging this capacitor can store a "1" or a "0" in the cell. However, the charge in this capacitor slowly leaks away, and must be refreshed periodically. Because of this refresh process, DRAM uses more power, but it can achieve greater storage densities and lower unit costs compared to SRAM.

{| style="text-align:center; margin: 1em auto 1em auto"

|[[File:SRAM Cell (6 Transistors).svg|thumb|class=skin-invert-image|SRAM cell (6 transistors)]]||[[File:DRAM Cell Structure (Model of Single Circuit Cell).PNG|thumb|DRAM cell (1 transistor and one capacitor)]]

|}<!--[[User:Kvng/RTH]]-->

|}

==Addressing==