Transaction-level modeling: Difference between revisions

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{{Short description|Approach for digital systems design}}

'''Transaction-level modeling''' ('''TLM''') is an approach to modelling complex digital systems by using [[electronic design automation]] software.<ref name="TVLSIHB-2007">{{Cite book |url=https://www.worldcat.org/oclc/70699056 |title=The VLSI handbook |date=2007 |publisher=CRC/Taylor & Francis |others=Wai-Kai Chen |isbn=978-0-8493-4199-1 |edition=2 |___location=Boca Raton, FL |oclc=70699056}}</ref>{{Rp|page=1955}} TLM is used primarily in the design and verification of complex [[System-on-a-chip|systems-on-chip]] (SoCs) and other electronic systems where traditional [[register-transfer level]] (RTL) modeling would be too slow or resource-intensive for system-level analysis. TLM language (TLML) is a [[hardware description language]], usually, written in C++ and based on [[SystemC]] library.<ref name="TVLSIHB-2007" /> TLMLs are used for modelling where details of communication among modules are separated from the details of the implementation of functional units or of the communication architecture. It's used for modelling of systems that involve complex data communication mechanisms.{{r|TVLSIHB-2007|pp=1955}} The modeling approach focuses on the ''transactions'' or ''transfers'' of data between functional blocks rather than the detailed implementation of those blocks or their interconnections.<ref name="IEEE_TLM_Standard">{{cite journal |title=IEEE Standard for Standard SystemC Language Reference Manual |journal=IEEE STD 1666-2011 |year=2012 |doi=10.1109/IEEESTD.2012.6134619|isbn=978-0-7381-6801-2 }}</ref> This abstraction enables faster simulation speeds, often orders of magnitude faster than RTL, while maintaining sufficient accuracy for system-level design decisions, [[software development]], and architectural exploration.<ref name="Ghenassia_TLM">{{cite book |title=Transaction-Level Modeling with SystemC |editor=Ghenassia, Frank |publisher=Springer |year=2005 |isbn=978-0-387-26233-4}}</ref>

Components such as buses or [[FIFO (computing and electronics)|FIFOs]] are modeled as channels, and are presented to modules using [[SystemC]] interface classes. Transaction requests take place by calling interface functions of these channel models, which encapsulate low-level details of the information exchange. At the transaction level, the emphasis is more on the functionality of the data transfers – what data are transferred to and from what locations – and less on their actual implementation, that is, on the actual protocol used for data transfer. This approach makes it easier for the system-level designer to experiment, for example, with different bus architectures (all supporting a common abstract interface) without having to recode models that interact with any of the buses, provided these models interact with the bus through the common interface.<ref>T. Grötker, S. Liao, G. Martin, S. Swan, System Design with SystemC. Springer, 2002, Chapter 8., pp. 131. {{ISBN|1-4020-7072-1}} (quoted with permission)</ref>